Lines Matching refs:BIT_ULL
13 #define MCG_CTL_P BIT_ULL(8) /* MCG_CTL register available */
14 #define MCG_EXT_P BIT_ULL(9) /* Extended registers available */
15 #define MCG_CMCI_P BIT_ULL(10) /* CMCI supported */
19 #define MCG_SER_P BIT_ULL(24) /* MCA recovery/new status bits */
20 #define MCG_ELOG_P BIT_ULL(26) /* Extended error log supported */
21 #define MCG_LMCE_P BIT_ULL(27) /* Local machine check supported */
24 #define MCG_STATUS_RIPV BIT_ULL(0) /* restart ip valid */
25 #define MCG_STATUS_EIPV BIT_ULL(1) /* ip points to correct instruction */
26 #define MCG_STATUS_MCIP BIT_ULL(2) /* machine check in progress */
27 #define MCG_STATUS_LMCES BIT_ULL(3) /* LMCE signaled */
30 #define MCG_EXT_CTL_LMCE_EN BIT_ULL(0) /* Enable LMCE */
33 #define MCI_STATUS_VAL BIT_ULL(63) /* valid error */
34 #define MCI_STATUS_OVER BIT_ULL(62) /* previous errors lost */
35 #define MCI_STATUS_UC BIT_ULL(61) /* uncorrected error */
36 #define MCI_STATUS_EN BIT_ULL(60) /* error enabled */
37 #define MCI_STATUS_MISCV BIT_ULL(59) /* misc error reg. valid */
38 #define MCI_STATUS_ADDRV BIT_ULL(58) /* addr reg. valid */
39 #define MCI_STATUS_PCC BIT_ULL(57) /* processor context corrupt */
40 #define MCI_STATUS_S BIT_ULL(56) /* Signaled machine check */
41 #define MCI_STATUS_AR BIT_ULL(55) /* Action required */
48 #define MCI_STATUS_TCC BIT_ULL(55) /* Task context corrupt */
49 #define MCI_STATUS_SYNDV BIT_ULL(53) /* synd reg. valid */
50 #define MCI_STATUS_DEFERRED BIT_ULL(44) /* uncorrected error, deferred exception */
51 #define MCI_STATUS_POISON BIT_ULL(43) /* access poisonous data */
52 #define MCI_STATUS_SCRUB BIT_ULL(40) /* Error detected during scrub operation */
95 #define MCI_CTL2_CMCI_EN BIT_ULL(30)
137 #define MCE_HANDLED_CEC BIT_ULL(0)
138 #define MCE_HANDLED_UC BIT_ULL(1)
139 #define MCE_HANDLED_EXTLOG BIT_ULL(2)
140 #define MCE_HANDLED_NFIT BIT_ULL(3)
141 #define MCE_HANDLED_EDAC BIT_ULL(4)
142 #define MCE_HANDLED_MCELOG BIT_ULL(5)
150 #define MCE_IN_KERNEL_RECOV BIT_ULL(6)
158 #define MCE_IN_KERNEL_COPYIN BIT_ULL(7)