Lines Matching defs:code
56 u64 code;
66 return ((ecode & c->cmask) - c->code) <= (u64)c->size;
348 .code = (c), \
398 * Constraint on the Event code.
410 * Constraint on the Event code + UMask + fixed-mask
440 * Constraint on the Event code + UMask
481 #define INTEL_ALL_EVENT_CONSTRAINT(code, n) \
482 EVENT_CONSTRAINT(code, n, X86_ALL_EVENT_FLAGS)
484 /* Check flags and event code, and set the HSW store flag */
485 #define INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_ST(code, n) \
486 __EVENT_CONSTRAINT(code, n, \
490 /* Check flags and event code, and set the HSW load flag */
491 #define INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_LD(code, n) \
492 __EVENT_CONSTRAINT(code, n, \
496 #define INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_LD_RANGE(code, end, n) \
497 __EVENT_CONSTRAINT_RANGE(code, end, n, \
501 #define INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_XLD(code, n) \
502 __EVENT_CONSTRAINT(code, n, \
507 /* Check flags and event code/umask, and set the HSW store flag */
508 #define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_ST(code, n) \
509 __EVENT_CONSTRAINT(code, n, \
513 #define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XST(code, n) \
514 __EVENT_CONSTRAINT(code, n, \
519 /* Check flags and event code/umask, and set the HSW load flag */
520 #define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_LD(code, n) \
521 __EVENT_CONSTRAINT(code, n, \
525 #define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XLD(code, n) \
526 __EVENT_CONSTRAINT(code, n, \
531 /* Check flags and event code/umask, and set the HSW N/A flag */
532 #define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_NA(code, n) \
533 __EVENT_CONSTRAINT(code, n, \
1207 * vm86 mode using the known zero-based code segment and 'fix up' the registers