Lines Matching defs:RX0
22 #define RX0 %xmm0
189 vbroadcastss (4*(round))(%rdi), RX0; \
190 vpxor s1, RX0, RX0; \
191 vpxor s2, RX0, RX0; \
192 vpxor s3, RX0, RX0; /* s1 ^ s2 ^ s3 ^ rk */ \
195 transform_pre(RX0, RTMP4, RB0, MASK_4BIT, RTMP0); \
196 vaesenclast MASK_4BIT, RX0, RX0; \
197 transform_post(RX0, RB1, RB2, MASK_4BIT, RTMP0); \
200 vpshufb RB3, RX0, RTMP0; \
202 vpshufb RTMP2, RX0, RTMP1; \
204 vpshufb RTMP3, RX0, RTMP1; \
206 vpshufb .Linv_shift_row_rol_24 rRIP, RX0, RTMP1; \
277 vbroadcastss (4*(round))(%rdi), RX0; \
280 vmovdqa RX0, RX1; \
281 vpxor s1, RX0, RX0; \
282 vpxor s2, RX0, RX0; \
283 vpxor s3, RX0, RX0; /* s1 ^ s2 ^ s3 ^ rk */ \
291 transform_pre(RX0, RTMP4, RTMP1, MASK_4BIT, RTMP0); \
294 vaesenclast MASK_4BIT, RX0, RX0; \
296 transform_post(RX0, RTMP2, RTMP3, MASK_4BIT, RTMP0); \
300 vpshufb RTMP4, RX0, RTMP0; \
305 vpshufb RTMP4, RX0, RTMP1; \
310 vpshufb RTMP4, RX0, RTMP1; \
315 vpshufb RTMP4, RX0, RTMP1; \