Lines Matching refs:start
45 .start = 0xfd000000,
50 .start = 0xc0000000,
55 .start = 0x10000000,
60 .start = 0xfe100000,
69 .start = 0xfd800000,
74 .start = 0xa0000000,
79 .start = 0x30000000,
84 .start = 0xfe300000,
93 .start = 0xfc800000,
98 .start = 0x80000000,
103 .start = 0x20000000,
108 .start = 0xfcd00000,
116 #define DEFINE_CONTROLLER(start, idx) \
121 .reg_base = start, \
145 r->start = 0;
365 * The start address must be aligned on its size. So we round
465 pci_write_reg(chan, upper_32_bits(res->start),
467 pci_write_reg(chan, lower_32_bits(res->start),
599 port->hose->io_map_base = port->hose->resources[0].start;