Lines Matching refs:port
203 static int __init pcie_clk_init(struct sh7786_pcie_port *port)
205 struct pci_channel *chan = port->hose;
218 * Grab the port's function clock, which the PHY clock depends
222 snprintf(fclk_name, sizeof(fclk_name), "pcie%d_fck", port->index);
224 port->fclk = clk_get(NULL, fclk_name);
225 if (IS_ERR(port->fclk)) {
226 ret = PTR_ERR(port->fclk);
230 clk_enable(port->fclk);
235 clk = &port->phy_clk;
250 clk_disable(port->fclk);
251 clk_put(port->fclk);
258 static int __init phy_init(struct sh7786_pcie_port *port)
260 struct pci_channel *chan = port->hose;
263 clk_enable(&port->phy_clk);
279 clk_disable(&port->phy_clk);
291 static void __init pcie_reset(struct sh7786_pcie_port *port)
293 struct pci_channel *chan = port->hose;
301 static int __init pcie_init(struct sh7786_pcie_port *port)
303 struct pci_channel *chan = port->hose;
309 pcie_reset(port);
312 * Initial header for port config space is type 1, set the device
322 if (port->endpoint)
342 data |= (port->index + 1) << 19;
416 * port to register anyways in order to support hotplug on future
435 port->index, (data >> 20) & 0x3f);
438 port->index);
501 struct sh7786_pcie_port *port = data;
508 port->endpoint = test_mode_pin(MODE_PIN11);
513 ret = pcie_clk_init(port);
515 pr_err("clock initialization failed for port#%d\n",
516 port->index);
520 ret = phy_init(port);
522 pr_err("phy initialization failed for port#%d\n",
523 port->index);
527 ret = pcie_init(port);
529 pr_err("core initialization failed for port#%d\n",
530 port->index);
537 register_pci_controller(port->hose);
595 struct sh7786_pcie_port *port = sh7786_pcie_ports + i;
597 port->index = i;
598 port->hose = sh7786_pci_channels + i;
599 port->hose->io_map_base = port->hose->resources[0].start;
601 async_schedule(sh7786_pcie_hwops->port_init_hw, port);