Lines Matching defs:chan
246 struct pci_channel *chan = &sh7780_pci_controller;
255 chan->reg_base = 0xfe040000;
262 chan->reg_base + SH4_PCICR);
271 id = __raw_readw(chan->reg_base + PCI_VENDOR_ID);
277 id = __raw_readw(chan->reg_base + PCI_DEVICE_ID);
290 type, __raw_readb(chan->reg_base + PCI_REVISION_ID));
297 chan->reg_base + SH4_PCICR);
307 __raw_writel(memphys + SZ_512M, chan->reg_base + SH4_PCILAR1);
309 chan->reg_base + SH4_PCILSR1);
315 __raw_writel(0, chan->reg_base + SH4_PCILAR1);
316 __raw_writel(0, chan->reg_base + SH4_PCILSR1);
323 __raw_writel(memphys, chan->reg_base + SH4_PCILAR0);
325 chan->reg_base + SH4_PCILSR0);
330 ret = sh7780_pci_setup_irqs(chan);
337 __raw_writel(0, chan->reg_base + SH7780_PCICSCR0);
338 __raw_writel(0, chan->reg_base + SH7780_PCICSAR0);
339 __raw_writel(0, chan->reg_base + SH7780_PCICSCR1);
340 __raw_writel(0, chan->reg_base + SH7780_PCICSAR1);
345 for (i = 1; i < chan->nr_resources; i++) {
346 struct resource *res = chan->resources + i;
357 chan->nr_resources--;
368 chan->reg_base + SH7780_PCIMBMR(i - 1));
369 __raw_writel(res->start, chan->reg_base + SH7780_PCIMBR(i - 1));
375 __raw_writel(0, chan->reg_base + PCI_BASE_ADDRESS_0);
376 __raw_writel(0, chan->reg_base + SH7780_PCIIOBR);
377 __raw_writel(0, chan->reg_base + SH7780_PCIIOBMR);
381 PCI_COMMAND_MEMORY, chan->reg_base + PCI_COMMAND);
389 chan->reg_base + SH4_PCICR);
391 ret = register_pci_controller(chan);
395 sh7780_pci66_init(chan);
398 (__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ)
404 sh7780_pci_teardown_irqs(chan);