Lines Matching refs:sie_block
24 #define IS_TE_ENABLED(vcpu) ((vcpu->arch.sie_block->ecb & ECB_TE))
27 ((*(char *)phys_to_virt((vcpu)->arch.sie_block->itdba) == TDB_FORMAT1))
57 d_vcpu->arch.sie_block->gpsw.mask, d_vcpu->arch.sie_block->gpsw.addr,\
63 atomic_or(flags, &vcpu->arch.sie_block->cpuflags);
68 atomic_andnot(flags, &vcpu->arch.sie_block->cpuflags);
73 return (atomic_read(&vcpu->arch.sie_block->cpuflags) & flags) == flags;
100 return vcpu->arch.sie_block->prefix << GUEST_PREFIX_SHIFT;
107 vcpu->arch.sie_block->prefix = prefix >> GUEST_PREFIX_SHIFT;
114 u32 base2 = vcpu->arch.sie_block->ipb >> 28;
115 u32 disp2 = ((vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16);
127 u32 base1 = (vcpu->arch.sie_block->ipb & 0xf0000000) >> 28;
128 u32 disp1 = (vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16;
129 u32 base2 = (vcpu->arch.sie_block->ipb & 0xf000) >> 12;
130 u32 disp2 = vcpu->arch.sie_block->ipb & 0x0fff;
144 *r1 = (vcpu->arch.sie_block->ipb & 0x00f00000) >> 20;
146 *r2 = (vcpu->arch.sie_block->ipb & 0x000f0000) >> 16;
151 u32 base2 = vcpu->arch.sie_block->ipb >> 28;
152 u32 disp2 = ((vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16) +
153 ((vcpu->arch.sie_block->ipb & 0xff00) << 4);
166 u32 base2 = vcpu->arch.sie_block->ipb >> 28;
167 u32 disp2 = ((vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16);
178 vcpu->arch.sie_block->gpsw.mask &= ~(3UL << 44);
179 vcpu->arch.sie_block->gpsw.mask |= cc << 44;
314 struct kvm_s390_sie_block *sie_block = vcpu->arch.sie_block;
316 sie_block->gpsw.addr = __rewind_psw(sie_block->gpsw, ilen);
325 vcpu->arch.sie_block->icptstatus &= ~0x02;