Lines Matching refs:gcr
62 u64 *cr9 = &vcpu->arch.sie_block->gcr[9];
63 u64 *cr10 = &vcpu->arch.sie_block->gcr[10];
64 u64 *cr11 = &vcpu->arch.sie_block->gcr[11];
102 u64 *cr9 = &vcpu->arch.sie_block->gcr[9];
103 u64 *cr10 = &vcpu->arch.sie_block->gcr[10];
104 u64 *cr11 = &vcpu->arch.sie_block->gcr[11];
132 vcpu->arch.guestdbg.cr0 = vcpu->arch.sie_block->gcr[0];
133 vcpu->arch.guestdbg.cr9 = vcpu->arch.sie_block->gcr[9];
134 vcpu->arch.guestdbg.cr10 = vcpu->arch.sie_block->gcr[10];
135 vcpu->arch.guestdbg.cr11 = vcpu->arch.sie_block->gcr[11];
140 vcpu->arch.sie_block->gcr[0] = vcpu->arch.guestdbg.cr0;
141 vcpu->arch.sie_block->gcr[9] = vcpu->arch.guestdbg.cr9;
142 vcpu->arch.sie_block->gcr[10] = vcpu->arch.guestdbg.cr10;
143 vcpu->arch.sie_block->gcr[11] = vcpu->arch.guestdbg.cr11;
156 vcpu->arch.sie_block->gcr[0] &= ~CR0_CLOCK_COMPARATOR_SUBMASK;
157 vcpu->arch.sie_block->gcr[9] |= PER_EVENT_IFETCH;
158 vcpu->arch.sie_block->gcr[10] = 0;
159 vcpu->arch.sie_block->gcr[11] = -1UL;
168 if (vcpu->arch.sie_block->gcr[9] & PER_EVENT_NULLIFICATION)
169 vcpu->arch.sie_block->gcr[9] &= ~PER_EVENT_NULLIFICATION;
499 const u64 cr10 = vcpu->arch.sie_block->gcr[10];
500 const u64 cr11 = vcpu->arch.sie_block->gcr[11];
522 !(vcpu->arch.sie_block->gcr[9] & PER_EVENT_IFETCH))
541 u64 cr9 = vcpu->arch.sie_block->gcr[9];
542 u64 cr10 = vcpu->arch.sie_block->gcr[10];
543 u64 cr11 = vcpu->arch.sie_block->gcr[11];
581 #define pssec(vcpu) (vcpu->arch.sie_block->gcr[1] & _ASCE_SPACE_SWITCH)
582 #define hssec(vcpu) (vcpu->arch.sie_block->gcr[13] & _ASCE_SPACE_SWITCH)