Lines Matching defs:rs1
229 static inline u32 rv_r_insn(u8 funct7, u8 rs2, u8 rs1, u8 funct3, u8 rd,
232 return (funct7 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) |
236 static inline u32 rv_i_insn(u16 imm11_0, u8 rs1, u8 funct3, u8 rd, u8 opcode)
238 return (imm11_0 << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7) |
242 static inline u32 rv_s_insn(u16 imm11_0, u8 rs2, u8 rs1, u8 funct3, u8 opcode)
246 return (imm11_5 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) |
250 static inline u32 rv_b_insn(u16 imm12_1, u8 rs2, u8 rs1, u8 funct3, u8 opcode)
255 return (imm12 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) |
274 static inline u32 rv_amo_insn(u8 funct5, u8 aq, u8 rl, u8 rs2, u8 rs1,
279 return rv_r_insn(funct7, rs2, rs1, funct3, rd, opcode);
307 static inline u16 rv_cl_insn(u8 funct3, u32 imm_hi, u8 rs1, u32 imm_lo, u8 rd,
310 return (funct3 << 13) | (imm_hi << 10) | ((rs1 & 0x7) << 7) |
314 static inline u16 rv_cs_insn(u8 funct3, u32 imm_hi, u8 rs1, u32 imm_lo, u8 rs2,
317 return (funct3 << 13) | (imm_hi << 10) | ((rs1 & 0x7) << 7) |
337 static inline u32 rv_addi(u8 rd, u8 rs1, u16 imm11_0)
339 return rv_i_insn(imm11_0, rs1, 0, rd, 0x13);
342 static inline u32 rv_andi(u8 rd, u8 rs1, u16 imm11_0)
344 return rv_i_insn(imm11_0, rs1, 7, rd, 0x13);
347 static inline u32 rv_ori(u8 rd, u8 rs1, u16 imm11_0)
349 return rv_i_insn(imm11_0, rs1, 6, rd, 0x13);
352 static inline u32 rv_xori(u8 rd, u8 rs1, u16 imm11_0)
354 return rv_i_insn(imm11_0, rs1, 4, rd, 0x13);
357 static inline u32 rv_slli(u8 rd, u8 rs1, u16 imm11_0)
359 return rv_i_insn(imm11_0, rs1, 1, rd, 0x13);
362 static inline u32 rv_srli(u8 rd, u8 rs1, u16 imm11_0)
364 return rv_i_insn(imm11_0, rs1, 5, rd, 0x13);
367 static inline u32 rv_srai(u8 rd, u8 rs1, u16 imm11_0)
369 return rv_i_insn(0x400 | imm11_0, rs1, 5, rd, 0x13);
382 static inline u32 rv_add(u8 rd, u8 rs1, u8 rs2)
384 return rv_r_insn(0, rs2, rs1, 0, rd, 0x33);
387 static inline u32 rv_sub(u8 rd, u8 rs1, u8 rs2)
389 return rv_r_insn(0x20, rs2, rs1, 0, rd, 0x33);
392 static inline u32 rv_sltu(u8 rd, u8 rs1, u8 rs2)
394 return rv_r_insn(0, rs2, rs1, 3, rd, 0x33);
397 static inline u32 rv_and(u8 rd, u8 rs1, u8 rs2)
399 return rv_r_insn(0, rs2, rs1, 7, rd, 0x33);
402 static inline u32 rv_or(u8 rd, u8 rs1, u8 rs2)
404 return rv_r_insn(0, rs2, rs1, 6, rd, 0x33);
407 static inline u32 rv_xor(u8 rd, u8 rs1, u8 rs2)
409 return rv_r_insn(0, rs2, rs1, 4, rd, 0x33);
412 static inline u32 rv_sll(u8 rd, u8 rs1, u8 rs2)
414 return rv_r_insn(0, rs2, rs1, 1, rd, 0x33);
417 static inline u32 rv_srl(u8 rd, u8 rs1, u8 rs2)
419 return rv_r_insn(0, rs2, rs1, 5, rd, 0x33);
422 static inline u32 rv_sra(u8 rd, u8 rs1, u8 rs2)
424 return rv_r_insn(0x20, rs2, rs1, 5, rd, 0x33);
427 static inline u32 rv_mul(u8 rd, u8 rs1, u8 rs2)
429 return rv_r_insn(1, rs2, rs1, 0, rd, 0x33);
432 static inline u32 rv_mulhu(u8 rd, u8 rs1, u8 rs2)
434 return rv_r_insn(1, rs2, rs1, 3, rd, 0x33);
437 static inline u32 rv_div(u8 rd, u8 rs1, u8 rs2)
439 return rv_r_insn(1, rs2, rs1, 4, rd, 0x33);
442 static inline u32 rv_divu(u8 rd, u8 rs1, u8 rs2)
444 return rv_r_insn(1, rs2, rs1, 5, rd, 0x33);
447 static inline u32 rv_rem(u8 rd, u8 rs1, u8 rs2)
449 return rv_r_insn(1, rs2, rs1, 6, rd, 0x33);
452 static inline u32 rv_remu(u8 rd, u8 rs1, u8 rs2)
454 return rv_r_insn(1, rs2, rs1, 7, rd, 0x33);
462 static inline u32 rv_jalr(u8 rd, u8 rs1, u16 imm11_0)
464 return rv_i_insn(imm11_0, rs1, 0, rd, 0x67);
467 static inline u32 rv_beq(u8 rs1, u8 rs2, u16 imm12_1)
469 return rv_b_insn(imm12_1, rs2, rs1, 0, 0x63);
472 static inline u32 rv_bne(u8 rs1, u8 rs2, u16 imm12_1)
474 return rv_b_insn(imm12_1, rs2, rs1, 1, 0x63);
477 static inline u32 rv_bltu(u8 rs1, u8 rs2, u16 imm12_1)
479 return rv_b_insn(imm12_1, rs2, rs1, 6, 0x63);
482 static inline u32 rv_bgtu(u8 rs1, u8 rs2, u16 imm12_1)
484 return rv_bltu(rs2, rs1, imm12_1);
487 static inline u32 rv_bgeu(u8 rs1, u8 rs2, u16 imm12_1)
489 return rv_b_insn(imm12_1, rs2, rs1, 7, 0x63);
492 static inline u32 rv_bleu(u8 rs1, u8 rs2, u16 imm12_1)
494 return rv_bgeu(rs2, rs1, imm12_1);
497 static inline u32 rv_blt(u8 rs1, u8 rs2, u16 imm12_1)
499 return rv_b_insn(imm12_1, rs2, rs1, 4, 0x63);
502 static inline u32 rv_bgt(u8 rs1, u8 rs2, u16 imm12_1)
504 return rv_blt(rs2, rs1, imm12_1);
507 static inline u32 rv_bge(u8 rs1, u8 rs2, u16 imm12_1)
509 return rv_b_insn(imm12_1, rs2, rs1, 5, 0x63);
512 static inline u32 rv_ble(u8 rs1, u8 rs2, u16 imm12_1)
514 return rv_bge(rs2, rs1, imm12_1);
517 static inline u32 rv_lb(u8 rd, u16 imm11_0, u8 rs1)
519 return rv_i_insn(imm11_0, rs1, 0, rd, 0x03);
522 static inline u32 rv_lh(u8 rd, u16 imm11_0, u8 rs1)
524 return rv_i_insn(imm11_0, rs1, 1, rd, 0x03);
527 static inline u32 rv_lw(u8 rd, u16 imm11_0, u8 rs1)
529 return rv_i_insn(imm11_0, rs1, 2, rd, 0x03);
532 static inline u32 rv_lbu(u8 rd, u16 imm11_0, u8 rs1)
534 return rv_i_insn(imm11_0, rs1, 4, rd, 0x03);
537 static inline u32 rv_lhu(u8 rd, u16 imm11_0, u8 rs1)
539 return rv_i_insn(imm11_0, rs1, 5, rd, 0x03);
542 static inline u32 rv_sb(u8 rs1, u16 imm11_0, u8 rs2)
544 return rv_s_insn(imm11_0, rs2, rs1, 0, 0x23);
547 static inline u32 rv_sh(u8 rs1, u16 imm11_0, u8 rs2)
549 return rv_s_insn(imm11_0, rs2, rs1, 1, 0x23);
552 static inline u32 rv_sw(u8 rs1, u16 imm11_0, u8 rs2)
554 return rv_s_insn(imm11_0, rs2, rs1, 2, 0x23);
557 static inline u32 rv_amoadd_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
559 return rv_amo_insn(0, aq, rl, rs2, rs1, 2, rd, 0x2f);
562 static inline u32 rv_amoand_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
564 return rv_amo_insn(0xc, aq, rl, rs2, rs1, 2, rd, 0x2f);
567 static inline u32 rv_amoor_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
569 return rv_amo_insn(0x8, aq, rl, rs2, rs1, 2, rd, 0x2f);
572 static inline u32 rv_amoxor_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
574 return rv_amo_insn(0x4, aq, rl, rs2, rs1, 2, rd, 0x2f);
577 static inline u32 rv_amoswap_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
579 return rv_amo_insn(0x1, aq, rl, rs2, rs1, 2, rd, 0x2f);
582 static inline u32 rv_lr_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
584 return rv_amo_insn(0x2, aq, rl, rs2, rs1, 2, rd, 0x2f);
587 static inline u32 rv_sc_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
589 return rv_amo_insn(0x3, aq, rl, rs2, rs1, 2, rd, 0x2f);
615 static inline u16 rvc_lw(u8 rd, u32 imm7, u8 rs1)
621 return rv_cl_insn(0x2, imm_hi, rs1, imm_lo, rd, 0x0);
624 static inline u16 rvc_sw(u8 rs1, u32 imm7, u8 rs2)
630 return rv_cs_insn(0x6, imm_hi, rs1, imm_lo, rs2, 0x0);
705 static inline u16 rvc_jr(u8 rs1)
707 return rv_cr_insn(0x8, rs1, RV_REG_ZERO, 0x2);
715 static inline u16 rvc_jalr(u8 rs1)
717 return rv_cr_insn(0x9, rs1, RV_REG_ZERO, 0x2);
742 static inline u32 rv_addiw(u8 rd, u8 rs1, u16 imm11_0)
744 return rv_i_insn(imm11_0, rs1, 0, rd, 0x1b);
747 static inline u32 rv_slliw(u8 rd, u8 rs1, u16 imm11_0)
749 return rv_i_insn(imm11_0, rs1, 1, rd, 0x1b);
752 static inline u32 rv_srliw(u8 rd, u8 rs1, u16 imm11_0)
754 return rv_i_insn(imm11_0, rs1, 5, rd, 0x1b);
757 static inline u32 rv_sraiw(u8 rd, u8 rs1, u16 imm11_0)
759 return rv_i_insn(0x400 | imm11_0, rs1, 5, rd, 0x1b);
762 static inline u32 rv_addw(u8 rd, u8 rs1, u8 rs2)
764 return rv_r_insn(0, rs2, rs1, 0, rd, 0x3b);
767 static inline u32 rv_subw(u8 rd, u8 rs1, u8 rs2)
769 return rv_r_insn(0x20, rs2, rs1, 0, rd, 0x3b);
772 static inline u32 rv_sllw(u8 rd, u8 rs1, u8 rs2)
774 return rv_r_insn(0, rs2, rs1, 1, rd, 0x3b);
777 static inline u32 rv_srlw(u8 rd, u8 rs1, u8 rs2)
779 return rv_r_insn(0, rs2, rs1, 5, rd, 0x3b);
782 static inline u32 rv_sraw(u8 rd, u8 rs1, u8 rs2)
784 return rv_r_insn(0x20, rs2, rs1, 5, rd, 0x3b);
787 static inline u32 rv_mulw(u8 rd, u8 rs1, u8 rs2)
789 return rv_r_insn(1, rs2, rs1, 0, rd, 0x3b);
792 static inline u32 rv_divw(u8 rd, u8 rs1, u8 rs2)
794 return rv_r_insn(1, rs2, rs1, 4, rd, 0x3b);
797 static inline u32 rv_divuw(u8 rd, u8 rs1, u8 rs2)
799 return rv_r_insn(1, rs2, rs1, 5, rd, 0x3b);
802 static inline u32 rv_remw(u8 rd, u8 rs1, u8 rs2)
804 return rv_r_insn(1, rs2, rs1, 6, rd, 0x3b);
807 static inline u32 rv_remuw(u8 rd, u8 rs1, u8 rs2)
809 return rv_r_insn(1, rs2, rs1, 7, rd, 0x3b);
812 static inline u32 rv_ld(u8 rd, u16 imm11_0, u8 rs1)
814 return rv_i_insn(imm11_0, rs1, 3, rd, 0x03);
817 static inline u32 rv_lwu(u8 rd, u16 imm11_0, u8 rs1)
819 return rv_i_insn(imm11_0, rs1, 6, rd, 0x03);
822 static inline u32 rv_sd(u8 rs1, u16 imm11_0, u8 rs2)
824 return rv_s_insn(imm11_0, rs2, rs1, 3, 0x23);
827 static inline u32 rv_amoadd_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
829 return rv_amo_insn(0, aq, rl, rs2, rs1, 3, rd, 0x2f);
832 static inline u32 rv_amoand_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
834 return rv_amo_insn(0xc, aq, rl, rs2, rs1, 3, rd, 0x2f);
837 static inline u32 rv_amoor_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
839 return rv_amo_insn(0x8, aq, rl, rs2, rs1, 3, rd, 0x2f);
842 static inline u32 rv_amoxor_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
844 return rv_amo_insn(0x4, aq, rl, rs2, rs1, 3, rd, 0x2f);
847 static inline u32 rv_amoswap_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
849 return rv_amo_insn(0x1, aq, rl, rs2, rs1, 3, rd, 0x2f);
852 static inline u32 rv_lr_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
854 return rv_amo_insn(0x2, aq, rl, rs2, rs1, 3, rd, 0x2f);
857 static inline u32 rv_sc_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
859 return rv_amo_insn(0x3, aq, rl, rs2, rs1, 3, rd, 0x2f);
864 static inline u16 rvc_ld(u8 rd, u32 imm8, u8 rs1)
870 return rv_cl_insn(0x3, imm_hi, rs1, imm_lo, rd, 0x0);
873 static inline u16 rvc_sd(u8 rs1, u32 imm8, u8 rs2)
879 return rv_cs_insn(0x7, imm_hi, rs1, imm_lo, rs2, 0x0);
930 static inline void emit_add(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
932 if (rvc_enabled() && rd && rd == rs1 && rs2)
935 emit(rv_add(rd, rs1, rs2), ctx);
999 static inline void emit_sub(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1001 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1004 emit(rv_sub(rd, rs1, rs2), ctx);
1007 static inline void emit_or(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1009 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1012 emit(rv_or(rd, rs1, rs2), ctx);
1015 static inline void emit_and(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1017 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1020 emit(rv_and(rd, rs1, rs2), ctx);
1023 static inline void emit_xor(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1025 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1028 emit(rv_xor(rd, rs1, rs2), ctx);
1031 static inline void emit_lw(u8 rd, s32 off, u8 rs1, struct rv_jit_context *ctx)
1033 if (rvc_enabled() && rs1 == RV_REG_SP && rd && is_8b_uint(off) && !(off & 0x3))
1035 else if (rvc_enabled() && is_creg(rd) && is_creg(rs1) && is_7b_uint(off) && !(off & 0x3))
1036 emitc(rvc_lw(rd, off, rs1), ctx);
1038 emit(rv_lw(rd, off, rs1), ctx);
1041 static inline void emit_sw(u8 rs1, s32 off, u8 rs2, struct rv_jit_context *ctx)
1043 if (rvc_enabled() && rs1 == RV_REG_SP && is_8b_uint(off) && !(off & 0x3))
1045 else if (rvc_enabled() && is_creg(rs1) && is_creg(rs2) && is_7b_uint(off) && !(off & 0x3))
1046 emitc(rvc_sw(rs1, off, rs2), ctx);
1048 emit(rv_sw(rs1, off, rs2), ctx);
1062 static inline void emit_ld(u8 rd, s32 off, u8 rs1, struct rv_jit_context *ctx)
1064 if (rvc_enabled() && rs1 == RV_REG_SP && rd && is_9b_uint(off) && !(off & 0x7))
1066 else if (rvc_enabled() && is_creg(rd) && is_creg(rs1) && is_8b_uint(off) && !(off & 0x7))
1067 emitc(rvc_ld(rd, off, rs1), ctx);
1069 emit(rv_ld(rd, off, rs1), ctx);
1072 static inline void emit_sd(u8 rs1, s32 off, u8 rs2, struct rv_jit_context *ctx)
1074 if (rvc_enabled() && rs1 == RV_REG_SP && is_9b_uint(off) && !(off & 0x7))
1076 else if (rvc_enabled() && is_creg(rs1) && is_creg(rs2) && is_8b_uint(off) && !(off & 0x7))
1077 emitc(rvc_sd(rs1, off, rs2), ctx);
1079 emit(rv_sd(rs1, off, rs2), ctx);
1082 static inline void emit_subw(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1084 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1087 emit(rv_subw(rd, rs1, rs2), ctx);