Lines Matching refs:reg_val

127 	unsigned long reg_val;
134 		reg_val = vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK;
139 		reg_val = riscv_cbom_block_size;
144 		reg_val = riscv_cboz_block_size;
147 		reg_val = vcpu->arch.mvendorid;
150 		reg_val = vcpu->arch.marchid;
153 		reg_val = vcpu->arch.mimpid;
156 		reg_val = satp_mode >> SATP_MODE_SHIFT;
162 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))
176 	unsigned long i, isa_ext, reg_val;
181 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))
190 		if (fls(reg_val) >= RISCV_ISA_EXT_BASE)
194 		 * Return early (i.e. do nothing) if reg_val is the same
197 		if (reg_val == (vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK))
205 					reg_val &= ~BIT(i);
209 					if (reg_val & BIT(i))
210 						reg_val &= ~BIT(i);
212 					if (!(reg_val & BIT(i)))
213 						reg_val |= BIT(i);
215 			reg_val &= riscv_isa_extension_base(NULL);
217 			reg_val = (vcpu->arch.isa[0] & ~KVM_RISCV_BASE_ISA_MASK) |
218 				  (reg_val & KVM_RISCV_BASE_ISA_MASK);
219 			vcpu->arch.isa[0] = reg_val;
228 		if (reg_val != riscv_cbom_block_size)
234 		if (reg_val != riscv_cboz_block_size)
238 		if (reg_val == vcpu->arch.mvendorid)
241 			vcpu->arch.mvendorid = reg_val;
246 		if (reg_val == vcpu->arch.marchid)
249 			vcpu->arch.marchid = reg_val;
254 		if (reg_val == vcpu->arch.mimpid)
257 			vcpu->arch.mimpid = reg_val;
262 		if (reg_val != (satp_mode >> SATP_MODE_SHIFT))
281 	unsigned long reg_val;
289 		reg_val = cntx->sepc;
292 		reg_val = ((unsigned long *)cntx)[reg_num];
294 		reg_val = (cntx->sstatus & SR_SPP) ?
299 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))
314 	unsigned long reg_val;
321 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))
325 		cntx->sepc = reg_val;
328 		((unsigned long *)cntx)[reg_num] = reg_val;
330 		if (reg_val == KVM_RISCV_MODE_S)
361 					  unsigned long reg_val)
369 		reg_val &= VSIP_VALID_MASK;
370 		reg_val <<= VSIP_TO_HVIP_SHIFT;
373 	((unsigned long *)csr)[reg_num] = reg_val;
390 	unsigned long reg_val, reg_subtype;
399 		rc = kvm_riscv_vcpu_general_get_csr(vcpu, reg_num, &reg_val);
402 		rc = kvm_riscv_vcpu_aia_get_csr(vcpu, reg_num, &reg_val);
411 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))
426 	unsigned long reg_val, reg_subtype;
431 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))
438 		rc = kvm_riscv_vcpu_general_set_csr(vcpu, reg_num, reg_val);
441 		rc = kvm_riscv_vcpu_aia_set_csr(vcpu, reg_num, reg_val);
455 					 unsigned long *reg_val)
467 	*reg_val = 0;
469 		*reg_val = 1; /* Mark the given extension as available */
476 					 unsigned long reg_val)
488 	if (reg_val == test_bit(host_isa_ext, vcpu->arch.isa))
496 		if (reg_val == 1 &&
499 		else if (!reg_val &&
514 					unsigned long *reg_val)
529 			*reg_val |= KVM_REG_RISCV_ISA_MULTI_MASK(ext_id);
537 					unsigned long reg_val, bool enable)
544 	for_each_set_bit(i, &reg_val, BITS_PER_LONG) {
564 	unsigned long reg_val, reg_subtype;
572 	reg_val = 0;
575 		rc = riscv_vcpu_get_isa_ext_single(vcpu, reg_num, &reg_val);
579 		rc = riscv_vcpu_get_isa_ext_multi(vcpu, reg_num, &reg_val);
581 			reg_val = ~reg_val;
589 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))
603 	unsigned long reg_val, reg_subtype;
611 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))
616 		return riscv_vcpu_set_isa_ext_single(vcpu, reg_num, reg_val);
618 		return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, true);
620 		return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, false);