Lines Matching refs:arch
47 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
48 struct kvm_vcpu_csr *reset_csr = &vcpu->arch.guest_reset_csr;
49 struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
50 struct kvm_cpu_context *reset_cntx = &vcpu->arch.guest_reset_context;
63 vcpu->arch.last_exit_cpu = -1;
77 bitmap_zero(vcpu->arch.irqs_pending, KVM_RISCV_VCPU_NR_IRQS);
78 bitmap_zero(vcpu->arch.irqs_pending_mask, KVM_RISCV_VCPU_NR_IRQS);
82 vcpu->arch.hfence_head = 0;
83 vcpu->arch.hfence_tail = 0;
84 memset(vcpu->arch.hfence_queue, 0, sizeof(vcpu->arch.hfence_queue));
101 struct kvm_vcpu_csr *reset_csr = &vcpu->arch.guest_reset_csr;
104 vcpu->arch.ran_atleast_once = false;
105 vcpu->arch.mmu_page_cache.gfp_zero = __GFP_ZERO;
106 bitmap_zero(vcpu->arch.isa, RISCV_ISA_EXT_MAX);
111 /* Setup vendor, arch, and implementation details */
112 vcpu->arch.mvendorid = sbi_get_mvendorid();
113 vcpu->arch.marchid = sbi_get_marchid();
114 vcpu->arch.mimpid = sbi_get_mimpid();
117 spin_lock_init(&vcpu->arch.hfence_lock);
120 cntx = &vcpu->arch.guest_reset_context;
172 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
196 !vcpu->arch.power_off && !vcpu->arch.pause);
206 return (vcpu->arch.guest_context.sstatus & SR_SPP) ? true : false;
322 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
325 if (READ_ONCE(vcpu->arch.irqs_pending_mask[0])) {
326 mask = xchg_acquire(&vcpu->arch.irqs_pending_mask[0], 0);
327 val = READ_ONCE(vcpu->arch.irqs_pending[0]) & mask;
340 struct kvm_vcpu_arch *v = &vcpu->arch;
341 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
380 set_bit(irq, vcpu->arch.irqs_pending);
382 set_bit(irq, vcpu->arch.irqs_pending_mask);
402 clear_bit(irq, vcpu->arch.irqs_pending);
404 set_bit(irq, vcpu->arch.irqs_pending_mask);
413 ie = ((vcpu->arch.guest_csr.vsie & VSIP_VALID_MASK)
415 ie |= vcpu->arch.guest_csr.vsie & ~IRQ_LOCAL_MASK &
417 if (READ_ONCE(vcpu->arch.irqs_pending[0]) & ie)
426 vcpu->arch.power_off = true;
433 vcpu->arch.power_off = false;
440 if (vcpu->arch.power_off)
455 vcpu->arch.power_off = false;
498 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
510 kvm_riscv_vcpu_update_config(vcpu->arch.isa);
516 kvm_riscv_vcpu_host_fp_save(&vcpu->arch.host_context);
517 kvm_riscv_vcpu_guest_fp_restore(&vcpu->arch.guest_context,
518 vcpu->arch.isa);
519 kvm_riscv_vcpu_host_vector_save(&vcpu->arch.host_context);
520 kvm_riscv_vcpu_guest_vector_restore(&vcpu->arch.guest_context,
521 vcpu->arch.isa);
530 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
536 kvm_riscv_vcpu_guest_fp_save(&vcpu->arch.guest_context,
537 vcpu->arch.isa);
538 kvm_riscv_vcpu_host_fp_restore(&vcpu->arch.host_context);
541 kvm_riscv_vcpu_guest_vector_save(&vcpu->arch.guest_context,
542 vcpu->arch.isa);
543 kvm_riscv_vcpu_host_vector_restore(&vcpu->arch.host_context);
564 (!vcpu->arch.power_off) && (!vcpu->arch.pause),
568 if (vcpu->arch.power_off || vcpu->arch.pause) {
603 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
619 __kvm_riscv_switch_to(&vcpu->arch);
620 vcpu->arch.last_exit_cpu = vcpu->cpu;
631 vcpu->arch.ran_atleast_once = true;
711 kvm_riscv_gstage_vmid_ver_changed(&vcpu->kvm->arch.vmid) ||
741 trap.sepc = vcpu->arch.guest_context.sepc;