Lines Matching refs:msi_data
49 struct fsl_msi *msi_data;
69 struct fsl_msi *msi_data = irqd->domain->host_data;
73 srs = (hwirq >> msi_data->srs_shift) & MSI_SRS_MASK;
74 cascade_virq = msi_data->cascade_array[srs]->virq;
90 struct fsl_msi *msi_data = h->host_data;
95 irq_set_chip_data(virq, msi_data);
105 static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
109 rc = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS_MAX,
110 irq_domain_get_of_node(msi_data->irqhost));
119 msi_bitmap_reserve_hwirq(&msi_data->bitmap, hwirq);
127 struct fsl_msi *msi_data;
132 msi_data = irq_get_chip_data(entry->irq);
136 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
144 struct fsl_msi *msi_data = fsl_msi_data;
155 address = fsl_pci_immrbar_base(hose) + msi_data->msiir_offset;
167 if (msi_data->feature & MSI_HW_ERRATA_ENDIAN)
173 (hwirq >> msi_data->srs_shift) & MSI_SRS_MASK,
174 (hwirq >> msi_data->ibs_shift) & MSI_IBS_MASK);
186 struct fsl_msi *msi_data;
194 list_for_each_entry(msi_data, &msi_head, list)
195 if (msi_data->feature & MSI_HW_ERRATA_ENDIAN)
224 list_for_each_entry(msi_data, &msi_head, list) {
233 if (phandle && (phandle != msi_data->phandle))
236 hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
247 virq = irq_create_mapping(msi_data->irqhost, hwirq);
251 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
255 /* chip_data is msi_data via host->hostdata in host->map() */
258 fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data);
270 struct fsl_msi *msi_data;
278 msi_data = cascade_data->msi_data;
282 switch (msi_data->feature & FSL_PIC_IP_MASK) {
284 msir_value = fsl_msi_read(msi_data->msi_regs,
288 msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4);
308 err = generic_handle_domain_irq(msi_data->irqhost,
309 msi_hwirq(msi_data, msir_index,
372 cascade_data->msi_data = msi;