Lines Matching defs:dev
13 int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode)
15 struct pci_controller *hose = pci_bus_to_host(dev->bus);
20 pe = pnv_ioda_get_pe(dev);
28 dev_err(&dev->dev, "Required cxl mode not supported by firmware - update skiboot\n");
30 dev_err(&dev->dev, "opal_pci_set_phb_cxl_mode failed: %i\n", rc);
36 /* Find PHB for cxl dev and allocate MSI hwirqs?
39 int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num)
41 struct pci_controller *hose = pci_bus_to_host(dev->bus);
46 dev_warn(&dev->dev, "Failed to find a free MSI\n");
54 void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num)
56 struct pci_controller *hose = pci_bus_to_host(dev->bus);
64 struct pci_dev *dev)
66 struct pci_controller *hose = pci_bus_to_host(dev->bus);
84 struct pci_dev *dev, int num)
86 struct pci_controller *hose = pci_bus_to_host(dev->bus);
115 pnv_cxl_release_hwirq_ranges(irqs, dev);
120 int pnv_cxl_get_irq_count(struct pci_dev *dev)
122 struct pci_controller *hose = pci_bus_to_host(dev->bus);
129 int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,
132 struct pci_controller *hose = pci_bus_to_host(dev->bus);
138 if (!(pe = pnv_ioda_get_pe(dev)))
146 pci_name(dev), rc, phb->msi_base, hwirq, xive_num);