Lines Matching refs:hose
93 /* Lookup the "bus-range" property for the hose */
140 struct pci_controller *hose;
142 hose = pci_bus_to_host(bus);
143 if (hose == NULL)
146 if (bus->number == hose->first_busno) {
155 out_le32(hose->cfg_addr, caddr);
156 } while (in_le32(hose->cfg_addr) != caddr);
159 return hose->cfg_data + offset;
204 static void __init setup_chaos(struct pci_controller *hose,
208 hose->ops = &chaos_pci_ops;
209 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
210 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000);
229 static int u3_ht_skip_device(struct pci_controller *hose,
245 busdn = hose->dn;
270 static void __iomem *u3_ht_cfg_access(struct pci_controller *hose, u8 bus,
274 if (bus == hose->first_busno) {
276 return hose->cfg_data + U3_HT_CFA0(devfn, offset);
278 return ((void __iomem *)hose->cfg_addr) + (offset << 2);
280 return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset);
286 struct pci_controller *hose;
290 hose = pci_bus_to_host(bus);
291 if (hose == NULL)
295 addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap);
299 switch (u3_ht_skip_device(hose, bus, devfn)) {
337 struct pci_controller *hose;
341 hose = pci_bus_to_host(bus);
342 if (hose == NULL)
346 addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap);
350 switch (u3_ht_skip_device(hose, bus, devfn)) {
400 struct pci_controller *hose;
406 hose = pci_bus_to_host(bus);
407 if (!hose)
410 if (bus->number == hose->first_busno) {
417 out_le32(hose->cfg_addr, caddr);
418 } while (in_le32(hose->cfg_addr) != caddr);
421 return hose->cfg_data + offset;
450 * N.B. we could clean this up using the hose ops directly.
494 struct pci_controller* hose;
508 * So we must use OF walking to find out hose
510 hose = pci_find_hose_for_OF_device(p2pbridge);
511 if (!hose) {
512 DBG("Can't find hose for PCI<->PCI bridge\n");
515 if (early_read_config_word(hose, bus, devfn,
522 early_write_config_word(hose, bus, devfn, PCI_BRIDGE_CONTROL, val);
540 struct pci_controller* hose =
542 if (!hose) {
543 printk(KERN_ERR "Can't find PCI hose for OHare2 !\n");
547 early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd);
550 early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd);
567 struct pci_controller *hose;
589 hose = pci_find_hose_for_OF_device(nec);
590 if (!hose)
592 early_read_config_dword(hose, bus, devfn, 0xe4, &data);
597 early_write_config_dword(hose, bus, devfn, 0xe4, data);
602 static void __init setup_bandit(struct pci_controller *hose,
605 hose->ops = ¯isc_pci_ops;
606 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
607 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000);
608 init_bandit(hose);
611 static int __init setup_uninorth(struct pci_controller *hose,
616 hose->ops = ¯isc_pci_ops;
617 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
618 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000);
625 static void __init setup_u3_agp(struct pci_controller* hose)
636 hose->first_busno = 0xf0;
637 hose->last_busno = 0xff;
639 hose->ops = ¯isc_pci_ops;
640 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000);
641 hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000);
642 u3_agp = hose;
645 static void __init setup_u4_pcie(struct pci_controller* hose)
650 hose->ops = &u4_pcie_pci_ops;
651 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000);
652 hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000);
660 hose->first_busno = 0x00;
661 hose->last_busno = 0xff;
664 static void __init parse_region_decode(struct pci_controller *hose,
688 hose->mem_resources[cur].flags = IORESOURCE_MEM;
689 hose->mem_resources[cur].name = hose->dn->full_name;
690 hose->mem_resources[cur].start = base;
691 hose->mem_resources[cur].end = end;
692 hose->mem_offset[cur] = 0;
696 hose->mem_resources[cur].end = end;
702 static void __init setup_u3_ht(struct pci_controller* hose)
704 struct device_node *np = hose->dn;
708 hose->ops = &u3_ht_pci_ops;
721 hose->cfg_data = ioremap(cfg_res.start, 0x02000000);
722 hose->cfg_addr = ioremap(self_res.start, resource_size(&self_res));
729 hose->io_base_phys = 0xf4000000;
730 hose->pci_io_size = 0x00400000;
731 hose->io_resource.name = np->full_name;
732 hose->io_resource.start = 0;
733 hose->io_resource.end = 0x003fffff;
734 hose->io_resource.flags = IORESOURCE_IO;
735 hose->first_busno = 0;
736 hose->last_busno = 0xef;
739 decode = in_be32(hose->cfg_addr + 0x80);
763 parse_region_decode(hose, decode);
775 struct pci_controller *hose;
793 hose = pcibios_alloc_controller(dev);
794 if (!hose)
796 hose->first_busno = bus_range ? bus_range[0] : 0;
797 hose->last_busno = bus_range ? bus_range[1] : 0xff;
798 hose->controller_ops = pmac_pci_controller_ops;
805 setup_u3_agp(hose);
809 setup_u3_ht(hose);
813 setup_u4_pcie(hose);
818 " %d->%d\n", disp_name, hose->first_busno, hose->last_busno);
824 primary = setup_uninorth(hose, &rsrc);
828 setup_grackle(hose);
831 setup_bandit(hose, &rsrc);
834 setup_chaos(hose, &rsrc);
840 disp_name, (unsigned long long)rsrc.start, hose->first_busno,
841 hose->last_busno);
845 hose, hose->cfg_addr, hose->cfg_data);
849 pci_process_bridge_OF_ranges(hose, dev, primary);
856 pci_devs_phb_init_dynamic(hose);
883 struct pci_controller *hose = pci_bus_to_host(bridge->bus);
886 if (hose != u3_agp)
894 np = hose->dn;