Lines Matching refs:uic

3  * arch/powerpc/sysdev/uic.c
27 #include <asm/uic.h>
40 struct uic *primary_uic;
42 struct uic {
54 struct uic *uic = irq_data_get_irq_chip_data(d);
60 raw_spin_lock_irqsave(&uic->lock, flags);
63 mtdcr(uic->dcrbase + UIC_SR, sr);
64 er = mfdcr(uic->dcrbase + UIC_ER);
66 mtdcr(uic->dcrbase + UIC_ER, er);
67 raw_spin_unlock_irqrestore(&uic->lock, flags);
72 struct uic *uic = irq_data_get_irq_chip_data(d);
77 raw_spin_lock_irqsave(&uic->lock, flags);
78 er = mfdcr(uic->dcrbase + UIC_ER);
80 mtdcr(uic->dcrbase + UIC_ER, er);
81 raw_spin_unlock_irqrestore(&uic->lock, flags);
86 struct uic *uic = irq_data_get_irq_chip_data(d);
90 raw_spin_lock_irqsave(&uic->lock, flags);
91 mtdcr(uic->dcrbase + UIC_SR, 1 << (31-src));
92 raw_spin_unlock_irqrestore(&uic->lock, flags);
97 struct uic *uic = irq_data_get_irq_chip_data(d);
103 raw_spin_lock_irqsave(&uic->lock, flags);
104 er = mfdcr(uic->dcrbase + UIC_ER);
106 mtdcr(uic->dcrbase + UIC_ER, er);
116 mtdcr(uic->dcrbase + UIC_SR, sr);
117 raw_spin_unlock_irqrestore(&uic->lock, flags);
122 struct uic *uic = irq_data_get_irq_chip_data(d);
151 raw_spin_lock_irqsave(&uic->lock, flags);
152 tr = mfdcr(uic->dcrbase + UIC_TR);
153 pr = mfdcr(uic->dcrbase + UIC_PR);
157 mtdcr(uic->dcrbase + UIC_PR, pr);
158 mtdcr(uic->dcrbase + UIC_TR, tr);
159 mtdcr(uic->dcrbase + UIC_SR, ~mask);
161 raw_spin_unlock_irqrestore(&uic->lock, flags);
178 struct uic *uic = h->host_data;
180 irq_set_chip_data(virq, uic);
200 struct uic *uic = irq_desc_get_handler_data(desc);
211 msr = mfdcr(uic->dcrbase + UIC_MSR);
217 generic_handle_domain_irq(uic->irqhost, src);
228 static struct uic * __init uic_init_one(struct device_node *node)
230 struct uic *uic;
234 BUG_ON(! of_device_is_compatible(node, "ibm,uic"));
236 uic = kzalloc(sizeof(*uic), GFP_KERNEL);
237 if (! uic)
240 raw_spin_lock_init(&uic->lock);
243 printk(KERN_ERR "uic: Device node %pOF has missing or invalid "
247 uic->index = *indexp;
251 printk(KERN_ERR "uic: Device node %pOF has missing or invalid "
255 uic->dcrbase = *dcrreg;
257 uic->irqhost = irq_domain_add_linear(node, NR_UIC_INTS, &uic_host_ops,
258 uic);
259 if (! uic->irqhost)
263 mtdcr(uic->dcrbase + UIC_ER, 0);
264 mtdcr(uic->dcrbase + UIC_CR, 0);
265 mtdcr(uic->dcrbase + UIC_TR, 0);
267 mtdcr(uic->dcrbase + UIC_SR, 0xffffffff);
269 printk ("UIC%d (%d IRQ sources) at DCR 0x%x\n", uic->index,
270 NR_UIC_INTS, uic->dcrbase);
272 return uic;
278 struct uic *uic;
282 for_each_compatible_node(np, NULL, "ibm,uic") {
298 for_each_compatible_node(np, NULL, "ibm,uic") {
304 uic = uic_init_one(np);
305 if (! uic)
311 irq_set_handler_data(cascade_virq, uic);