Lines Matching refs:mbase
1234 void __iomem *mbase;
1239 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
1240 if (mbase == NULL) {
1246 while (attempt && (0 == (in_le32(mbase + PECFG_460SX_DLLSTA)
1253 iounmap(mbase);
1372 void __iomem *mbase = ioremap(port->cfg_space.start + 0x10000000,
1377 if (mbase == NULL) {
1384 val = in_le32(mbase + PECFG_TLDLP);
1397 iounmap(mbase);
1708 void __iomem *mbase,
1735 out_le32(mbase + PECFG_POM0LAH, pciah);
1736 out_le32(mbase + PECFG_POM0LAL, pcial);
1758 out_le32(mbase + PECFG_POM1LAH, pciah);
1759 out_le32(mbase + PECFG_POM1LAL, pcial);
1767 out_le32(mbase + PECFG_POM2LAH, pciah);
1768 out_le32(mbase + PECFG_POM2LAL, pcial);
1784 void __iomem *mbase)
1803 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1821 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1831 ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1838 void __iomem *mbase,
1857 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1858 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) |
1862 out_le32(mbase + PECFG_BAR1MPA, 0);
1863 out_le32(mbase + PECFG_BAR2HMPA, 0);
1864 out_le32(mbase + PECFG_BAR2LMPA, 0);
1866 out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa));
1867 out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa));
1869 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr));
1870 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr));
1884 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1885 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
1890 out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
1891 out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
1892 out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
1893 out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
1894 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
1895 out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
1897 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
1898 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
1902 out_le32(mbase + PECFG_PIMEN, 0x1);
1905 out_le16(mbase + PCI_COMMAND,
1906 in_le16(mbase + PCI_COMMAND) |
1916 void __iomem *mbase = NULL, *cfg_data = NULL;
1969 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
1970 if (mbase == NULL) {
1975 hose->cfg_addr = mbase;
1985 mbase = (void __iomem *)hose->cfg_addr;
1991 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
1992 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
1993 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
1999 out_le32(mbase + PECFG_PIMEN, 0);
2005 if (ppc4xx_parse_dma_ranges(hose, mbase, &dma_window) != 0)
2009 ppc4xx_configure_pciex_POMs(port, hose, mbase);
2012 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window);
2031 out_le16(mbase + 0x200, val);
2042 out_le16(mbase + 0x202, val);
2046 out_le16(mbase + 0x204, 0x7);
2050 out_le32(mbase + 0x208, 0x06040001);
2056 out_le32(mbase + 0x208, 0x0b200001);
2068 if (mbase)
2069 iounmap(mbase);