Lines Matching refs:value
98 * requires that we set a non-zero value.
111 static int p10_thresh_cmp_val(u64 value)
114 u64 result = value;
116 if (!value)
117 return value;
120 * Incase of P10, thresh_cmp value is not part of raw event code
129 if (value > 261120)
130 value = 261120;
131 while ((64 - __builtin_clzl(value)) > 8) {
133 value >>= 2;
141 if (!(value & 0xC0) && exp)
144 result = (exp << 8) | value;
149 static u64 thresh_cmp_val(u64 value)
152 value = p10_thresh_cmp_val(value);
156 * is different for p8, using different shift value.
159 return value << p9_MMCRA_THR_CMP_SHIFT;
161 return value << MMCRA_THR_CMP_SHIFT;
337 * MMCRA sampling bits [57:59] along with the type value
404 unsigned long mask, value;
406 mask = value = 0;
435 value |= CNST_PMC_VAL(pmc);
455 value |= CNST_NC_VAL;
462 value |= CNST_L2L3_GROUP_VAL(event >> p10_L2L3_EVENT_SHIFT);
466 value |= CNST_CACHE_GROUP_VAL(event & 0xff);
470 value |= CNST_CACHE_PMC4_VAL;
479 * irrelevant, as long as the rest of the value is 0.
486 value |= CNST_L1_QUAL_VAL(cache);
491 value |= CNST_RADIX_SCOPE_GROUP_VAL(event >> p10_EVENT_RADIX_SCOPE_QUAL_SHIFT);
496 value |= CNST_SAMPLE_VAL(event >> EVENT_SAMPLE_SHIFT);
502 value |= CNST_THRESH_CTL_SEL_VAL(event >> EVENT_THRESH_SHIFT);
504 value |= p10_CNST_THRESH_CMP_VAL(p10_thresh_cmp_val(event_config1));
510 value |= CNST_THRESH_VAL(event >> EVENT_THRESH_SHIFT);
516 * the threshold control bits are used for the match value.
520 value |= CNST_FAB_MATCH_VAL(event >> EVENT_THR_CTL_SHIFT);
526 value |= CNST_THRESH_VAL(event >> EVENT_THRESH_SHIFT);
541 value |= CNST_IFM_VAL(event >> EVENT_IFM_SHIFT);
550 value |= CNST_EBB_VAL(ebb);
553 *valp = value;
639 * the threshold bits are used for the match value.
810 * value of 0b11 is reserved.
816 * Check for all reserved value