Lines Matching defs:IS_LE
62 #define IS_LE 1
65 #define IS_LE 0
749 err = read_mem(®s->gpr[reg + IS_LE], ea, 8, regs);
775 err = write_mem(vals[IS_LE], ea, 8, regs);
803 if (IS_LE && (op->vsx_flags & VSX_LDLEFT))
811 i = IS_LE ? 8 : 8 - read_size;
818 reg->d[IS_LE] = (signed int) reg->d[IS_LE];
821 conv_sp_to_dp(®->fp[1 + IS_LE],
822 ®->dp[IS_LE]);
830 reg->d[IS_BE] = reg->d[IS_LE];
837 i = IS_LE ? 3 - j : j;
841 u32 val = reg->w[IS_LE ? 3 : 0];
843 i = IS_LE ? 3 - j : j;
852 i = IS_LE ? 7 - j : j;
860 i = IS_LE ? 15 - j : j;
902 if (IS_LE && (op->vsx_flags & VSX_LDLEFT))
915 i = IS_LE ? 8 : 8 - write_size;
919 conv_dp_to_sp(®->dp[IS_LE], &buf.fp[1 + IS_LE]);
936 i = IS_LE ? 3 - j : j;
944 i = IS_LE ? 7 - j : j;
952 i = IS_LE ? 15 - j : j;
981 j = IS_LE ? nr_vsx_regs - i - 1 : i;
986 j = IS_LE ? nr_vsx_regs - i - 1 : i;
994 j = IS_LE ? nr_vsx_regs - i - 1 : i;
999 j = IS_LE ? nr_vsx_regs - i - 1 : i;
1027 j = IS_LE ? nr_vsx_regs - i - 1 : i;
1032 j = IS_LE ? nr_vsx_regs - i - 1 : i;
1040 j = IS_LE ? nr_vsx_regs - i - 1 : i;
1045 j = IS_LE ? nr_vsx_regs - i - 1 : i;