Lines Matching refs:arch
94 printk("pc: %08lx msr: %08llx\n", vcpu->arch.regs.nip,
95 vcpu->arch.shared->msr);
96 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.regs.link,
97 vcpu->arch.regs.ctr);
98 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
99 vcpu->arch.shared->srr1);
101 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
119 vcpu->arch.shadow_msr &= ~MSR_SPE;
129 vcpu->arch.shadow_msr |= MSR_SPE;
135 if (vcpu->arch.shared->msr & MSR_SPE) {
136 if (!(vcpu->arch.shadow_msr & MSR_SPE))
138 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
162 load_fp_state(&vcpu->arch.fp);
164 current->thread.fp_save_area = &vcpu->arch.fp;
188 vcpu->arch.shadow_msr &= ~MSR_FP;
189 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
204 load_vr_state(&vcpu->arch.vr);
206 current->thread.vr_save_area = &vcpu->arch.vr;
232 vcpu->arch.shadow_msr &= ~MSR_DE;
233 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
243 vcpu->arch.shared->msr |= MSR_DE;
245 vcpu->arch.shadow_msr |= MSR_DE;
246 vcpu->arch.shared->msr &= ~MSR_DE;
257 u32 old_msr = vcpu->arch.shared->msr;
263 vcpu->arch.shared->msr = new_msr;
275 set_bit(priority, &vcpu->arch.pending_exceptions);
281 vcpu->arch.queued_dear = dear_flags;
282 vcpu->arch.queued_esr = esr_flags;
290 vcpu->arch.queued_dear = dear_flags;
291 vcpu->arch.queued_esr = esr_flags;
302 vcpu->arch.queued_esr = esr_flags;
309 vcpu->arch.queued_dear = dear_flags;
310 vcpu->arch.queued_esr = esr_flags;
316 vcpu->arch.queued_esr = esr_flags;
341 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
346 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
362 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
363 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
373 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
383 clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions);
394 vcpu->arch.csrr0 = srr0;
395 vcpu->arch.csrr1 = srr1;
401 vcpu->arch.dsrr0 = srr0;
402 vcpu->arch.dsrr1 = srr1;
410 vcpu->arch.mcsrr0 = srr0;
411 vcpu->arch.mcsrr1 = srr1;
421 ulong crit_raw = vcpu->arch.shared->critical;
426 ulong new_msr = vcpu->arch.shared->msr;
429 if (!(vcpu->arch.shared->msr & MSR_SF)) {
437 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
444 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
477 allowed = vcpu->arch.shared->msr & MSR_CE;
483 allowed = vcpu->arch.shared->msr & MSR_ME;
493 allowed = vcpu->arch.shared->msr & MSR_EE;
499 allowed = vcpu->arch.shared->msr & MSR_DE;
513 set_guest_srr(vcpu, vcpu->arch.regs.nip,
514 vcpu->arch.shared->msr);
517 set_guest_csrr(vcpu, vcpu->arch.regs.nip,
518 vcpu->arch.shared->msr);
521 set_guest_dsrr(vcpu, vcpu->arch.regs.nip,
522 vcpu->arch.shared->msr);
525 set_guest_mcsrr(vcpu, vcpu->arch.regs.nip,
526 vcpu->arch.shared->msr);
530 vcpu->arch.regs.nip = vcpu->arch.ivpr |
531 vcpu->arch.ivor[priority];
533 kvmppc_set_esr(vcpu, vcpu->arch.queued_esr);
535 kvmppc_set_dar(vcpu, vcpu->arch.queued_dear);
537 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
539 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
540 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
547 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
553 clear_bit(priority, &vcpu->arch.pending_exceptions);
562 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
564 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
566 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
582 u32 period = TCR_GET_WP(vcpu->arch.tcr);
613 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
616 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
623 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
625 del_timer(&vcpu->arch.wdt_timer);
626 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
631 struct kvm_vcpu *vcpu = from_timer(vcpu, t, arch.wdt_timer);
636 new_tsr = tsr = vcpu->arch.tsr;
648 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
660 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
661 vcpu->arch.watchdog_enabled) {
679 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
684 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
692 unsigned long *pending = &vcpu->arch.pending_exceptions;
706 vcpu->arch.shared->int_pending = !!*pending;
722 if (vcpu->arch.shared->msr & MSR_WE) {
752 vcpu->arch.epr_needed = true;
765 if (!vcpu->arch.sane) {
800 debug = vcpu->arch.dbg_reg;
803 current->thread.debug = vcpu->arch.dbg_reg;
805 vcpu->arch.pgdir = vcpu->kvm->mm->pgd;
848 __func__, vcpu->arch.regs.nip, vcpu->arch.last_inst);
852 vcpu->run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
867 struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg);
868 u32 dbsr = vcpu->arch.dbsr;
881 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) &&
882 (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM))
886 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE))
894 * Clear guest dbsr (vcpu->arch.dbsr)
896 vcpu->arch.dbsr = 0;
897 run->debug.arch.status = 0;
898 run->debug.arch.address = vcpu->arch.regs.nip;
901 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
904 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
906 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
908 run->debug.arch.address = dbg_reg->dac1;
910 run->debug.arch.address = dbg_reg->dac2;
935 * (such as from arch/powerpc/kernel/head_fsl_booke.S).
978 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
993 __func__, vcpu->arch.regs.nip);
1151 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
1160 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
1177 if (vcpu->arch.shared->msr & MSR_SPE)
1212 __func__, exit_nr, vcpu->arch.regs.nip);
1235 kvmppc_core_queue_data_storage(vcpu, 0, vcpu->arch.fault_dear,
1236 vcpu->arch.fault_esr);
1242 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1248 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1249 vcpu->arch.fault_esr);
1255 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1269 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1284 unsigned long eaddr = vcpu->arch.fault_dear;
1290 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1291 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1305 vcpu->arch.fault_dear,
1306 vcpu->arch.fault_esr);
1331 vcpu->arch.paddr_accessed = gpaddr;
1332 vcpu->arch.vaddr_accessed = eaddr;
1342 unsigned long eaddr = vcpu->arch.regs.nip;
1418 u32 old_tsr = vcpu->arch.tsr;
1420 vcpu->arch.tsr = new_tsr;
1422 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1431 spin_lock_init(&vcpu->arch.wdt_lock);
1432 timer_setup(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 0);
1444 del_timer_sync(&vcpu->arch.wdt_timer);
1453 regs->pc = vcpu->arch.regs.nip;
1455 regs->ctr = vcpu->arch.regs.ctr;
1456 regs->lr = vcpu->arch.regs.link;
1458 regs->msr = vcpu->arch.shared->msr;
1461 regs->pid = vcpu->arch.pid;
1484 vcpu->arch.regs.nip = regs->pc;
1486 vcpu->arch.regs.ctr = regs->ctr;
1487 vcpu->arch.regs.link = regs->lr;
1516 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1517 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1518 sregs->u.e.mcsr = vcpu->arch.mcsr;
1521 sregs->u.e.tsr = vcpu->arch.tsr;
1522 sregs->u.e.tcr = vcpu->arch.tcr;
1525 sregs->u.e.vrsave = vcpu->arch.vrsave;
1534 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1535 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1536 vcpu->arch.mcsr = sregs->u.e.mcsr;
1539 vcpu->arch.vrsave = sregs->u.e.vrsave;
1543 vcpu->arch.dec = sregs->u.e.dec;
1559 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1560 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1561 sregs->u.e.decar = vcpu->arch.decar;
1562 sregs->u.e.ivpr = vcpu->arch.ivpr;
1574 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1575 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1576 vcpu->arch.decar = sregs->u.e.decar;
1577 vcpu->arch.ivpr = sregs->u.e.ivpr;
1586 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1587 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1588 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1589 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1590 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1591 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1592 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1593 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1594 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1595 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1596 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1597 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1598 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1599 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1600 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1601 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1610 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1611 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1612 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1613 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1614 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1615 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1616 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1617 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1618 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1619 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1620 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1621 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1622 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1623 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1624 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1625 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1637 sregs->pvr = vcpu->arch.pvr;
1641 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1653 if (vcpu->arch.pvr != sregs->pvr)
1664 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1678 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1);
1681 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2);
1685 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3);
1688 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4);
1692 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1);
1695 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2);
1704 *val = get_reg_val(id, vcpu->arch.epcr);
1708 *val = get_reg_val(id, vcpu->arch.tcr);
1711 *val = get_reg_val(id, vcpu->arch.tsr);
1717 *val = get_reg_val(id, vcpu->arch.vrsave);
1720 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
1734 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val);
1737 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val);
1741 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val);
1744 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val);
1748 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val);
1751 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val);
1786 vcpu->arch.vrsave = set_reg_val(id, *val);
1789 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
1853 vcpu->arch.epcr = new_epcr;
1855 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1856 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
1857 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1864 vcpu->arch.tcr = new_tcr;
1871 set_bits(tsr_bits, &vcpu->arch.tsr);
1879 clear_bits(tsr_bits, &vcpu->arch.tsr);
1893 if (vcpu->arch.tcr & TCR_ARE) {
1894 vcpu->arch.dec = vcpu->arch.decar;
1964 vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1966 vcpu->arch.shadow_msrp |= MSRP_DEP;
1968 vcpu->arch.shadow_msrp |= MSRP_PMMP;
1971 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1973 vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1975 vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1987 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1988 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1990 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) |
2041 vcpu->arch.dbg_reg.dbcr0 = 0;
2049 vcpu->arch.dbg_reg.dbcr0 = 0;
2052 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
2055 dbg_reg = &(vcpu->arch.dbg_reg);
2080 uint64_t addr = dbg->arch.bp[n].addr;
2081 uint32_t type = dbg->arch.bp[n].type;
2126 return kvm->arch.kvm_ops->init_vm(kvm);
2134 r = vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
2139 vcpu->arch.regs.nip = 0;
2140 vcpu->arch.shared->pir = vcpu->vcpu_id;
2145 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
2146 vcpu->arch.shadow_pid = 1;
2147 vcpu->arch.shared->msr = 0;
2152 vcpu->arch.ivpr = 0x55550000;
2154 vcpu->arch.ivor[i] = 0x7700 | i * 4;
2160 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2167 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2172 kvm->arch.kvm_ops->destroy_vm(kvm);
2177 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
2182 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);