Lines Matching refs:size
437 /* Max payload size = 128 bytes for best Octeon DMA performance */
439 /* Max read request size = 128 bytes for best Octeon DMA performance */
1538 unsigned int devfn, int reg, int size,
1668 " size=%d ", pcie_port, bus_number, devfn, reg, size);
1670 switch (size) {
1710 int reg, int size, u32 *val)
1712 return octeon_pcie_read_config(0, bus, devfn, reg, size, val);
1716 int reg, int size, u32 *val)
1718 return octeon_pcie_read_config(1, bus, devfn, reg, size, val);
1722 int reg, int size, u32 *val)
1732 int size, u32 val)
1742 " reg=0x%03x size=%d val=%08x\n", pcie_port, bus_number, devfn,
1743 reg, size, val);
1746 switch (size) {
1766 int reg, int size, u32 val)
1768 return octeon_pcie_write_config(0, bus, devfn, reg, size, val);
1772 int reg, int size, u32 val)
1774 return octeon_pcie_write_config(1, bus, devfn, reg, size, val);
1778 int reg, int size, u32 val)