Lines Matching defs:rpc
81 static inline u32 rt3883_pci_r32(struct rt3883_pci_controller *rpc,
84 return ioread32(rpc->base + reg);
87 static inline void rt3883_pci_w32(struct rt3883_pci_controller *rpc,
90 iowrite32(val, rpc->base + reg);
100 static u32 rt3883_pci_read_cfg32(struct rt3883_pci_controller *rpc,
108 rt3883_pci_w32(rpc, address, RT3883_PCI_REG_CFGADDR);
110 return rt3883_pci_r32(rpc, RT3883_PCI_REG_CFGDATA);
113 static void rt3883_pci_write_cfg32(struct rt3883_pci_controller *rpc,
121 rt3883_pci_w32(rpc, address, RT3883_PCI_REG_CFGADDR);
122 rt3883_pci_w32(rpc, val, RT3883_PCI_REG_CFGDATA);
127 struct rt3883_pci_controller *rpc;
130 rpc = irq_desc_get_handler_data(desc);
132 pending = rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIINT) &
133 rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIENA);
143 generic_handle_domain_irq(rpc->irq_domain, bit);
151 struct rt3883_pci_controller *rpc;
154 rpc = irq_data_get_irq_chip_data(d);
156 t = rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIENA);
157 rt3883_pci_w32(rpc, t | BIT(d->hwirq), RT3883_PCI_REG_PCIENA);
159 rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIENA);
164 struct rt3883_pci_controller *rpc;
167 rpc = irq_data_get_irq_chip_data(d);
169 t = rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIENA);
170 rt3883_pci_w32(rpc, t & ~BIT(d->hwirq), RT3883_PCI_REG_PCIENA);
172 rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIENA);
197 struct rt3883_pci_controller *rpc)
201 irq = irq_of_parse_and_map(rpc->intc_of_node, 0);
203 dev_err(dev, "%pOF has no IRQ", rpc->intc_of_node);
208 rt3883_pci_w32(rpc, 0, RT3883_PCI_REG_PCIENA);
210 rpc->irq_domain =
211 irq_domain_add_linear(rpc->intc_of_node, RT3883_PCI_IRQ_COUNT,
213 rpc);
214 if (!rpc->irq_domain) {
219 irq_set_chained_handler_and_data(irq, rt3883_pci_irq_handler, rpc);
227 struct rt3883_pci_controller *rpc;
231 rpc = pci_bus_to_rt3883_controller(bus);
233 if (!rpc->pcie_ready && bus->number == 1)
239 rt3883_pci_w32(rpc, address, RT3883_PCI_REG_CFGADDR);
240 data = rt3883_pci_r32(rpc, RT3883_PCI_REG_CFGDATA);
260 struct rt3883_pci_controller *rpc;
264 rpc = pci_bus_to_rt3883_controller(bus);
266 if (!rpc->pcie_ready && bus->number == 1)
272 rt3883_pci_w32(rpc, address, RT3883_PCI_REG_CFGADDR);
273 data = rt3883_pci_r32(rpc, RT3883_PCI_REG_CFGDATA);
289 rt3883_pci_w32(rpc, data, RT3883_PCI_REG_CFGDATA);
299 static void rt3883_pci_preinit(struct rt3883_pci_controller *rpc, unsigned mode)
366 rt3883_pci_w32(rpc, t, RT3883_PCI_REG_PCICFG);
369 rt3883_pci_r32(rpc, RT3883_PCI_REG_PCICFG);
375 t = rt3883_pci_r32(rpc, RT3883_PCI_REG_STATUS(1));
377 rpc->pcie_ready = t & BIT(0);
379 if (!rpc->pcie_ready) {
399 rt3883_pci_w32(rpc, 0x79, RT3883_PCI_REG_ARBCTL);
404 struct rt3883_pci_controller *rpc;
412 rpc = devm_kzalloc(dev, sizeof(*rpc), GFP_KERNEL);
413 if (!rpc)
416 rpc->base = devm_platform_ioremap_resource(pdev, 0);
417 if (IS_ERR(rpc->base))
418 return PTR_ERR(rpc->base);
423 rpc->intc_of_node = child;
428 if (!rpc->intc_of_node) {
437 rpc->pci_controller.of_node = child;
442 if (!rpc->pci_controller.of_node) {
450 for_each_available_child_of_node(rpc->pci_controller.of_node, child) {
482 rt3883_pci_preinit(rpc, mode);
484 rpc->pci_controller.pci_ops = &rt3883_pci_ops;
485 rpc->pci_controller.io_resource = &rpc->io_res;
486 rpc->pci_controller.mem_resource = &rpc->mem_res;
489 pci_load_of_ranges(&rpc->pci_controller,
490 rpc->pci_controller.of_node);
492 rt3883_pci_w32(rpc, rpc->mem_res.start, RT3883_PCI_REG_MEMBASE);
493 rt3883_pci_w32(rpc, rpc->io_res.start, RT3883_PCI_REG_IOBASE);
495 ioport_resource.start = rpc->io_res.start;
496 ioport_resource.end = rpc->io_res.end;
499 rt3883_pci_w32(rpc, 0x03ff0000, RT3883_PCI_REG_BAR0SETUP(0));
500 rt3883_pci_w32(rpc, RT3883_MEMORY_BASE, RT3883_PCI_REG_IMBASEBAR0(0));
501 rt3883_pci_w32(rpc, 0x08021814, RT3883_PCI_REG_ID(0));
502 rt3883_pci_w32(rpc, 0x00800001, RT3883_PCI_REG_CLASS(0));
503 rt3883_pci_w32(rpc, 0x28801814, RT3883_PCI_REG_SUBID(0));
506 rt3883_pci_w32(rpc, 0x03ff0000, RT3883_PCI_REG_BAR0SETUP(1));
507 rt3883_pci_w32(rpc, RT3883_MEMORY_BASE, RT3883_PCI_REG_IMBASEBAR0(1));
508 rt3883_pci_w32(rpc, 0x08021814, RT3883_PCI_REG_ID(1));
509 rt3883_pci_w32(rpc, 0x06040001, RT3883_PCI_REG_CLASS(1));
510 rt3883_pci_w32(rpc, 0x28801814, RT3883_PCI_REG_SUBID(1));
512 err = rt3883_pci_irq_init(dev, rpc);
517 val = rt3883_pci_read_cfg32(rpc, 0, 0x01, 0, PCI_COMMAND);
519 rt3883_pci_write_cfg32(rpc, 0, 0x01, 0, PCI_COMMAND, val);
522 val = rt3883_pci_read_cfg32(rpc, 0, 0x00, 0, PCI_COMMAND);
524 rt3883_pci_write_cfg32(rpc, 0, 0x00, 0, PCI_COMMAND, val);
527 rt3883_pci_w32(rpc, 0x03ff0001, RT3883_PCI_REG_BAR0SETUP(0));
528 rt3883_pci_w32(rpc, 0x03ff0001, RT3883_PCI_REG_BAR0SETUP(1));
530 rt3883_pci_write_cfg32(rpc, 0, RT3883_P2P_BR_DEVNUM, 0,
534 rt3883_pci_read_cfg32(rpc, 0, RT3883_P2P_BR_DEVNUM, 0,
537 rt3883_pci_write_cfg32(rpc, 0, RT3883_P2P_BR_DEVNUM, 0,
541 register_pci_controller(&rpc->pci_controller);
546 of_node_put(rpc->pci_controller.of_node);
548 of_node_put(rpc->intc_of_node);