Lines Matching refs:dev
54 static void qube_raq_galileo_early_fixup(struct pci_dev *dev)
56 if (dev->devfn == PCI_DEVFN(0, 0) &&
57 (dev->class >> 8) == PCI_CLASS_MEMORY_OTHER) {
59 dev->class = (PCI_CLASS_BRIDGE_HOST << 8) | (dev->class & 0xff);
68 static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev)
74 pci_read_config_word(dev, PCI_COMMAND, &cfgword);
76 pci_write_config_word(dev, PCI_COMMAND, cfgword);
79 pci_write_config_byte(dev, 0x40, 0xb);
82 pci_read_config_byte(dev, PCI_LATENCY_TIMER, <);
84 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
85 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 8);
91 static void qube_raq_galileo_fixup(struct pci_dev *dev)
93 if (dev->devfn != PCI_DEVFN(0, 0))
99 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
100 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 8);
118 printk(KERN_INFO "Galileo: revision %u\n", dev->revision);
121 if (dev->revision >= 0x10) {
124 } else if (dev->revision == 0x1 || dev->revision == 0x2)
146 static void qube_raq_via_board_id_fixup(struct pci_dev *dev)
151 retval = pci_read_config_byte(dev, VIA_COBALT_BRD_ID_REG, &id);
192 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
204 int pcibios_plat_dev_init(struct pci_dev *dev)