Lines Matching refs:K0
47 #define K0 26
252 UASM_i_LA(&p, K0, ST0_EXL | KSU_USER | ST0_BEV | ST0_KX_IF_64);
253 uasm_i_mtc0(&p, K0, C0_STATUS);
257 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1);
258 build_set_exc_base(&p, K0);
265 uasm_i_addiu(&p, K0, ZERO, ST0_EXL | KSU_USER | ST0_IE | ST0_KX_IF_64);
267 uasm_i_or(&p, K0, K0, V0);
268 uasm_i_mtc0(&p, K0, C0_STATUS);
304 UASM_i_MFC0(&p, K0, C0_PWBASE);
306 UASM_i_MFC0(&p, K0, c0_kscratch(), pgd_reg);
307 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_pgd), K1);
330 uasm_i_mfc0(&p, K0, C0_GUESTCTL0);
331 uasm_i_ins(&p, K0, V1, MIPS_GCTL0_GM_SHIFT, 1);
332 uasm_i_mtc0(&p, K0, C0_GUESTCTL0);
356 UASM_i_MFC0(&p, K0, C0_ENTRYHI);
357 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_entryhi),
370 UASM_i_LW(&p, K0, 0, T3);
382 uasm_i_and(&p, K0, K0, T2);
384 uasm_i_andi(&p, K0, K0, MIPS_ENTRYHI_ASID);
388 uasm_i_mtc0(&p, K0, C0_ENTRYHI);
398 if (i == K0 || i == K1)
405 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, hi), K1);
406 uasm_i_mthi(&p, K0);
408 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, lo), K1);
409 uasm_i_mtlo(&p, K0);
413 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1);
453 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu, arch.gprs[K0]), K1);
463 uasm_i_lddir(&p, K0, K1, 3); /* global page dir */
465 uasm_i_lddir(&p, K1, K0, 1); /* middle page dir */
483 build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
485 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
490 build_get_ptep(&p, K0, K1);
491 build_update_entries(&p, K0, K1);
501 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu, arch.gprs[K0]), K1);
540 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1);
588 if (i == K0 || i == K1)
616 UASM_i_MFC0(&p, K0, C0_EPC);
617 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, pc), K1);
619 UASM_i_MFC0(&p, K0, C0_BADVADDR);
620 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_badvaddr),
623 uasm_i_mfc0(&p, K0, C0_CAUSE);
624 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_cause), K1);
627 uasm_i_mfc0(&p, K0, C0_BADINSTR);
628 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch,
633 uasm_i_mfc0(&p, K0, C0_BADINSTRP);
634 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch,
645 uasm_i_or(&p, K0, V0, AT);
647 uasm_i_mtc0(&p, K0, C0_STATUS);
650 UASM_i_LA_mostly(&p, K0, (long)&ebase);
651 UASM_i_LW(&p, K0, uasm_rel_lo((long)&ebase), K0);
652 build_set_exc_base(&p, K0);
688 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, host_entryhi),
690 UASM_i_MTC0(&p, K0, C0_ENTRYHI);
710 uasm_i_mfc0(&p, K0, C0_GUESTCTL0);
711 uasm_i_ins(&p, K0, ZERO, MIPS_GCTL0_GM_SHIFT, 1);
712 uasm_i_mtc0(&p, K0, C0_GUESTCTL0);
715 uasm_i_sw(&p, K0,
756 kvm_mips_build_restore_scratch(&p, K0, SP);
759 UASM_i_LA_mostly(&p, K0, (long)&hwrena);
760 uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0);
761 uasm_i_mtc0(&p, K0, C0_HWRENA);
854 uasm_i_or(&p, K0, V1, AT);
855 uasm_i_mtc0(&p, K0, C0_STATUS);
894 uasm_i_sra(&p, K0, V0, 2);
895 uasm_i_move(&p, V0, K0);
905 UASM_i_LA_mostly(&p, K0, (long)&hwrena);
906 uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0);
907 uasm_i_mtc0(&p, K0, C0_HWRENA);