Lines Matching refs:r4030_read_reg32
254 r4030_read_reg32(JAZZ_R4030_CONFIG));
256 r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
258 r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
260 r4030_read_reg32(JAZZ_R4030_INV_ADDR));
262 r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
264 r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
266 r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
268 r4030_read_reg32(JAZZ_R4030_I386_ERROR));
272 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
278 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
300 status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
310 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
318 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
332 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
340 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
342 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
344 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
349 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
410 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
417 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
466 residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
482 enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));