Lines Matching defs:config
34 #include <asm/octeon/cvmx-config.h>
77 union cvmx_pko_mem_iqueue_ptrs config;
81 config.u64 = 0;
82 config.s.index = queue;
83 config.s.qid = base_queue + queue;
84 config.s.ipid = pko_port;
85 config.s.tail = (queue == (num_queues - 1));
86 config.s.s_tail = (queue == static_priority_end);
87 config.s.static_p = (static_priority_base >= 0);
88 config.s.static_q = (queue <= static_priority_end);
89 config.s.qos_mask = 0xff;
105 config.s.buf_ptr = cvmx_ptr_to_phys(buf_ptr) >> 7;
107 cvmx_write_csr(CVMX_PKO_MEM_IQUEUE_PTRS, config.u64);
124 union cvmx_pko_mem_iport_ptrs config;
129 config.u64 = 0;
130 config.s.eid = 31; /* Invalid */
132 config.s.ipid = port;
133 cvmx_write_csr(CVMX_PKO_MEM_IPORT_PTRS, config.u64);
146 config.s.ipid = port;
147 config.s.qos_mask = 0xff;
148 config.s.crc = 1;
149 config.s.min_pkt = 1;
150 config.s.intr = __cvmx_pko_int(interface, index);
151 config.s.eid = config.s.intr;
152 config.s.pipe = (mode == CVMX_HELPER_INTERFACE_MODE_LOOP) ?
154 cvmx_write_csr(CVMX_PKO_MEM_IPORT_PTRS, config.u64);
181 * output system. This does chip global config, and should only be
187 union cvmx_pko_reg_cmd_buf config;
194 config.u64 = 0;
195 config.s.pool = CVMX_FPA_OUTPUT_BUFFER_POOL;
196 config.s.size = CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE / 8 - 1;
198 cvmx_write_csr(CVMX_PKO_REG_CMD_BUF, config.u64);
283 union cvmx_pko_mem_queue_ptrs config;
289 config.u64 = 0;
290 config.s.tail = 1;
291 config.s.index = 0;
292 config.s.port = CVMX_PKO_MEM_QUEUE_PTRS_ILLEGAL_PID;
293 config.s.queue = queue & 0x7f;
294 config.s.qos_mask = 0;
295 config.s.buf_ptr = 0;
302 cvmx_write_csr(CVMX_PKO_MEM_QUEUE_PTRS, config.u64);
332 union cvmx_pko_mem_queue_ptrs config;
429 config.u64 = 0;
430 config.s.tail = queue == (num_queues - 1);
431 config.s.index = queue;
432 config.s.port = port;
433 config.s.queue = base_queue + queue;
436 config.s.static_p = static_priority_base >= 0;
437 config.s.static_q = (int)queue <= static_priority_end;
438 config.s.s_tail = (int)queue == static_priority_end;
447 config.s.qos_mask = 0x00;
450 config.s.qos_mask = 0x01;
453 config.s.qos_mask = 0x11;
456 config.s.qos_mask = 0x49;
459 config.s.qos_mask = 0x55;
462 config.s.qos_mask = 0x57;
465 config.s.qos_mask = 0x77;
468 config.s.qos_mask = 0x7f;
471 config.s.qos_mask = 0xff;
475 config.s.qos_mask = 0xff;
483 config.s.qos_mask = 0xff;
522 config.s.buf_ptr = cvmx_ptr_to_phys(buf_ptr);
524 config.s.buf_ptr = 0;
530 cvmx_write_csr(CVMX_PKO_MEM_QUEUE_PTRS, config.u64);