clock.c - OpenGrok cross reference for /kernel/linux/linux-6.6/arch/mips/ath79/clock.c

Lines Matching defs:pll_base
93 static void __init ar71xx_clocks_init(void __iomem *pll_base)
105 	pll = __raw_readl(pll_base + AR71XX_PLL_REG_CPU_CONFIG);
124 static void __init ar724x_clocks_init(void __iomem *pll_base)
131 	pll = __raw_readl(pll_base + AR724X_PLL_REG_CPU_CONFIG);
144 static void __init ar933x_clocks_init(void __iomem *pll_base)
165 	clock_ctrl = __raw_readl(pll_base + AR933X_PLL_CLOCK_CTRL_REG);
178 		cpu_config = __raw_readl(pll_base + AR933X_PLL_CPU_CONFIG_REG);
232 static void __init ar934x_clocks_init(void __iomem *pll_base)
265 		pll = __raw_readl(pll_base + AR934X_PLL_CPU_CONFIG_REG);
292 		pll = __raw_readl(pll_base + AR934X_PLL_DDR_CONFIG_REG);
307 	clk_ctrl = __raw_readl(pll_base + AR934X_PLL_CPU_DDR_CLK_CTRL_REG);
343 	clk_ctrl = __raw_readl(pll_base + AR934X_PLL_SWITCH_CLOCK_CONTROL_REG);
350 static void __init qca953x_clocks_init(void __iomem *pll_base)
368 	pll = __raw_readl(pll_base + QCA953X_PLL_CPU_CONFIG_REG);
382 	pll = __raw_readl(pll_base + QCA953X_PLL_DDR_CONFIG_REG);
396 	clk_ctrl = __raw_readl(pll_base + QCA953X_PLL_CLK_CTRL_REG);
433 static void __init qca955x_clocks_init(void __iomem *pll_base)
451 	pll = __raw_readl(pll_base + QCA955X_PLL_CPU_CONFIG_REG);
465 	pll = __raw_readl(pll_base + QCA955X_PLL_DDR_CONFIG_REG);
479 	clk_ctrl = __raw_readl(pll_base + QCA955X_PLL_CLK_CTRL_REG);
516 static void __init qca956x_clocks_init(void __iomem *pll_base)
544 	pll = __raw_readl(pll_base + QCA956X_PLL_CPU_CONFIG_REG);
550 	pll = __raw_readl(pll_base + QCA956X_PLL_CPU_CONFIG1_REG);
563 	pll = __raw_readl(pll_base + QCA956X_PLL_DDR_CONFIG_REG);
568 	pll = __raw_readl(pll_base + QCA956X_PLL_DDR_CONFIG1_REG);
581 	clk_ctrl = __raw_readl(pll_base + QCA956X_PLL_CLK_CTRL_REG);
621 	void __iomem *pll_base;
627 	pll_base = of_iomap(np, 0);
628 	if (!pll_base) {
634 		ar71xx_clocks_init(pll_base);
637 		ar724x_clocks_init(pll_base);
639 		ar933x_clocks_init(pll_base);
641 		ar934x_clocks_init(pll_base);
643 		qca953x_clocks_init(pll_base);
645 		qca955x_clocks_init(pll_base);
647 		qca956x_clocks_init(pll_base);
660 	iounmap(pll_base);