Lines Matching refs:m147_pcc
60 m147_pcc->watchdog = 0x0a; /* Clear timer */
61 m147_pcc->watchdog = 0xa5; /* Enable watchdog - 100ms to reset */
117 m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF | PCC_TIMER_COC_EN |
119 m147_pcc->t1_int_cntrl = PCC_INT_ENAB | PCC_TIMER_INT_CLR |
137 m147_pcc->t1_preload = PCC_TIMER_PRELOAD;
138 m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF | PCC_TIMER_COC_EN |
140 m147_pcc->t1_int_cntrl = PCC_INT_ENAB | PCC_TIMER_INT_CLR |
154 tmp = m147_pcc->t1_cntrl >> 4;
155 count = m147_pcc->t1_count;
156 overflow = m147_pcc->t1_cntrl >> 4;
158 count = m147_pcc->t1_count;