Lines Matching defs:bus
2 * pci.c -- PCI bus support for ColdFire processors
26 * PCI bus memory (no reason not to really). IO space is mapped in its own
34 * We need to be careful probing on bus 0 (directly connected to host
53 static unsigned long mcf_mk_pcicar(int bus, unsigned int devfn, int where)
55 return (bus << PCICAR_BUSN) | (devfn << PCICAR_DEVFNN) | (where & 0xfc);
58 static int mcf_pci_readconfig(struct pci_bus *bus, unsigned int devfn,
65 if (bus->number == 0) {
70 addr = mcf_mk_pcicar(bus->number, devfn, where);
92 static int mcf_pci_writeconfig(struct pci_bus *bus, unsigned int devfn,
97 if (bus->number == 0) {
102 addr = mcf_mk_pcicar(bus->number, devfn, where);
130 * Initialize the PCI bus registers, and scan the bus.
175 pr_info("ColdFire: PCI bus initialization...\n");
177 /* Reset the external PCI bus */
188 /* Set required multi-function pins for PCI bus use */
192 /* Set up config space for local host bus controller */
200 * These give the CPU bus access onto the PCI bus. One for each of
211 * Set up the target windows for access from the PCI bus back to the
212 * CPU bus. All we need is access to system RAM (for mastering).
248 rootbus = bridge->bus;