Lines Matching refs:dst
730 u32 aarch64_insn_gen_add_sub_imm(enum aarch64_insn_register dst,
780 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst);
791 u32 aarch64_insn_gen_bitfield(enum aarch64_insn_register dst,
837 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst);
846 u32 aarch64_insn_gen_movewide(enum aarch64_insn_register dst,
896 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst);
901 u32 aarch64_insn_gen_add_sub_shifted_reg(enum aarch64_insn_register dst,
950 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst);
959 u32 aarch64_insn_gen_data1(enum aarch64_insn_register dst,
997 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst);
1002 u32 aarch64_insn_gen_data2(enum aarch64_insn_register dst,
1045 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst);
1052 u32 aarch64_insn_gen_data3(enum aarch64_insn_register dst,
1084 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst);
1095 u32 aarch64_insn_gen_logical_shifted_reg(enum aarch64_insn_register dst,
1156 insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst);
1169 u32 aarch64_insn_gen_move_reg(enum aarch64_insn_register dst,
1173 return aarch64_insn_gen_logical_shifted_reg(dst, AARCH64_INSN_REG_ZR,