Lines Matching refs:val
75 u64 val = __vcpu_sys_reg(kvm_pmc_to_vcpu(pmc), PMCR_EL0);
77 return (pmc->idx < ARMV8_PMU_CYCLE_IDX && (val & ARMV8_PMU_PMCR_LP)) ||
78 (pmc->idx == ARMV8_PMU_CYCLE_IDX && (val & ARMV8_PMU_PMCR_LC));
132 static void kvm_pmu_set_pmc_value(struct kvm_pmc *pmc, u64 val, bool force)
149 val = __vcpu_sys_reg(vcpu, reg) & GENMASK(63, 32);
150 val |= lower_32_bits(val);
153 __vcpu_sys_reg(vcpu, reg) = val;
163 * @val: The counter value
165 void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
170 kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx), val, false);
195 u64 reg, val;
200 val = kvm_pmu_get_pmc_value(pmc);
204 __vcpu_sys_reg(vcpu, reg) = val;
253 u64 val = __vcpu_sys_reg(vcpu, PMCR_EL0) >> ARMV8_PMU_PMCR_N_SHIFT;
255 val &= ARMV8_PMU_PMCR_N_MASK;
256 if (val == 0)
259 return GENMASK(val - 1, 0) | BIT(ARMV8_PMU_CYCLE_IDX);
265 * @val: the value guest writes to PMCNTENSET register
269 void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val)
275 if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E) || !val)
281 if (!(val & BIT(i)))
299 * @val: the value guest writes to PMCNTENCLR register
303 void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val)
307 if (!kvm_vcpu_has_pmu(vcpu) || !val)
313 if (!(val & BIT(i)))
467 u64 val;
470 val = (-counter) & GENMASK(63, 0);
472 val = (-counter) & GENMASK(31, 0);
474 return val;
523 * @val: the value guest writes to PMSWINC register
525 void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val)
527 kvm_pmu_counter_increment(vcpu, val, ARMV8_PMUV3_PERFCTR_SW_INCR);
533 * @val: the value guest writes to PMCR register
535 void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val)
544 val &= ~ARMV8_PMU_PMCR_LP;
547 __vcpu_sys_reg(vcpu, PMCR_EL0) = val & ~(ARMV8_PMU_PMCR_C | ARMV8_PMU_PMCR_P);
549 if (val & ARMV8_PMU_PMCR_E) {
557 if (val & ARMV8_PMU_PMCR_C)
560 if (val & ARMV8_PMU_PMCR_P) {
747 u64 val, mask = 0;
754 val = read_sysreg(pmceid0_el0);
756 val |= BIT(ARMV8_PMUV3_PERFCTR_CHAIN);
759 val = read_sysreg(pmceid1_el0);
764 val &= ~(BIT_ULL(ARMV8_PMUV3_PERFCTR_STALL_SLOT - 32) |
771 return val;
786 return val & mask;