Lines Matching defs:vmcr
463 void __vgic_v3_write_vmcr(u32 vmcr)
465 write_gicreg(vmcr, ICH_VMCR_EL2);
484 static int __vgic_v3_highest_priority_lr(struct kvm_vcpu *vcpu, u32 vmcr,
500 if (!(val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG0_MASK))
504 if ((val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG1_MASK))
575 static unsigned int __vgic_v3_get_bpr0(u32 vmcr)
577 return (vmcr & ICH_VMCR_BPR0_MASK) >> ICH_VMCR_BPR0_SHIFT;
580 static unsigned int __vgic_v3_get_bpr1(u32 vmcr)
584 if (vmcr & ICH_VMCR_CBPR_MASK) {
585 bpr = __vgic_v3_get_bpr0(vmcr);
589 bpr = (vmcr & ICH_VMCR_BPR1_MASK) >> ICH_VMCR_BPR1_SHIFT;
599 static u8 __vgic_v3_pri_to_pre(u8 pri, u32 vmcr, int grp)
604 bpr = __vgic_v3_get_bpr0(vmcr) + 1;
606 bpr = __vgic_v3_get_bpr1(vmcr);
617 static void __vgic_v3_set_active_priority(u8 pri, u32 vmcr, int grp)
623 pre = __vgic_v3_pri_to_pre(pri, vmcr, grp);
674 static void __vgic_v3_read_iar(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
682 lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val);
689 pmr = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT;
694 if (__vgic_v3_get_highest_active_priority() <= __vgic_v3_pri_to_pre(lr_prio, vmcr, grp))
700 __vgic_v3_set_active_priority(lr_prio, vmcr, grp);
730 static void __vgic_v3_write_dir(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
737 if (!(vmcr & ICH_VMCR_EOIM_MASK))
753 static void __vgic_v3_write_eoir(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
774 if ((vmcr & ICH_VMCR_EOIM_MASK) && !(vid >= VGIC_MIN_LPI))
781 __vgic_v3_pri_to_pre(lr_prio, vmcr, grp) != act_prio)
788 static void __vgic_v3_read_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
790 vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG0_MASK));
793 static void __vgic_v3_read_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
795 vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG1_MASK));
798 static void __vgic_v3_write_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
803 vmcr |= ICH_VMCR_ENG0_MASK;
805 vmcr &= ~ICH_VMCR_ENG0_MASK;
807 __vgic_v3_write_vmcr(vmcr);
810 static void __vgic_v3_write_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
815 vmcr |= ICH_VMCR_ENG1_MASK;
817 vmcr &= ~ICH_VMCR_ENG1_MASK;
819 __vgic_v3_write_vmcr(vmcr);
822 static void __vgic_v3_read_bpr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
824 vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr0(vmcr));
827 static void __vgic_v3_read_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
829 vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr1(vmcr));
832 static void __vgic_v3_write_bpr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
843 vmcr &= ~ICH_VMCR_BPR0_MASK;
844 vmcr |= val;
846 __vgic_v3_write_vmcr(vmcr);
849 static void __vgic_v3_write_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
854 if (vmcr & ICH_VMCR_CBPR_MASK)
863 vmcr &= ~ICH_VMCR_BPR1_MASK;
864 vmcr |= val;
866 __vgic_v3_write_vmcr(vmcr);
892 u32 vmcr, int rt)
898 u32 vmcr, int rt)
903 static void __vgic_v3_read_apxr2(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
908 static void __vgic_v3_read_apxr3(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
913 static void __vgic_v3_write_apxr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
918 static void __vgic_v3_write_apxr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
923 static void __vgic_v3_write_apxr2(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
928 static void __vgic_v3_write_apxr3(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
933 static void __vgic_v3_read_hppir(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
940 lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val);
952 static void __vgic_v3_read_pmr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
954 vmcr &= ICH_VMCR_PMR_MASK;
955 vmcr >>= ICH_VMCR_PMR_SHIFT;
956 vcpu_set_reg(vcpu, rt, vmcr);
959 static void __vgic_v3_write_pmr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
965 vmcr &= ~ICH_VMCR_PMR_MASK;
966 vmcr |= val;
968 write_gicreg(vmcr, ICH_VMCR_EL2);
971 static void __vgic_v3_read_rpr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
977 static void __vgic_v3_read_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
992 val |= ((vmcr & ICH_VMCR_EOIM_MASK) >> ICH_VMCR_EOIM_SHIFT) << ICC_CTLR_EL1_EOImode_SHIFT;
994 val |= (vmcr & ICH_VMCR_CBPR_MASK) >> ICH_VMCR_CBPR_SHIFT;
999 static void __vgic_v3_write_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
1004 vmcr |= ICH_VMCR_CBPR_MASK;
1006 vmcr &= ~ICH_VMCR_CBPR_MASK;
1009 vmcr |= ICH_VMCR_EOIM_MASK;
1011 vmcr &= ~ICH_VMCR_EOIM_MASK;
1013 write_gicreg(vmcr, ICH_VMCR_EL2);
1020 u32 vmcr;
1136 vmcr = __vgic_v3_read_vmcr();
1138 fn(vcpu, vmcr, rt);