Lines Matching refs:x9
16 #define MX8ULP_PAD_PTD0__FLEXSPI2_B_DQS 0x0000 0x0974 0x9 0x1
26 #define MX8ULP_PAD_PTD1__FLEXSPI2_B_DATA7 0x0004 0x0970 0x9 0x1
35 #define MX8ULP_PAD_PTD2__FLEXSPI2_B_DATA6 0x0008 0x096C 0x9 0x1
44 #define MX8ULP_PAD_PTD3__FLEXSPI2_B_DATA5 0x000C 0x0968 0x9 0x1
56 #define MX8ULP_PAD_PTD4__FLEXSPI2_B_DATA4 0x0010 0x0964 0x9 0x1
67 #define MX8ULP_PAD_PTD5__FLEXSPI2_B_SS0_B 0x0014 0x0000 0x9 0x0
79 #define MX8ULP_PAD_PTD6__FLEXSPI2_B_SCLK 0x0018 0x0978 0x9 0x1
89 #define MX8ULP_PAD_PTD7__FLEXSPI2_B_DATA3 0x001C 0x0960 0x9 0x1
99 #define MX8ULP_PAD_PTD8__FLEXSPI2_B_DATA2 0x0020 0x095C 0x9 0x1
108 #define MX8ULP_PAD_PTD9__FLEXSPI2_B_DATA1 0x0024 0x0958 0x9 0x1
117 #define MX8ULP_PAD_PTD10__FLEXSPI2_B_DATA0 0x0028 0x0954 0x9 0x1
126 #define MX8ULP_PAD_PTD11__FLEXSPI2_B_SS0_B 0x002C 0x0000 0x9 0x0
136 #define MX8ULP_PAD_PTD12__FLEXSPI2_A_SS0_B 0x0030 0x0000 0x9 0x0
147 #define MX8ULP_PAD_PTD13__FLEXSPI2_A_SCLK 0x0034 0x0000 0x9 0x0
159 #define MX8ULP_PAD_PTD14__FLEXSPI2_A_DATA3 0x0038 0x0000 0x9 0x0
170 #define MX8ULP_PAD_PTD15__FLEXSPI2_A_DATA2 0x003C 0x0000 0x9 0x0
183 #define MX8ULP_PAD_PTD16__FLEXSPI2_A_DATA1 0x0040 0x0000 0x9 0x0
196 #define MX8ULP_PAD_PTD17__FLEXSPI2_A_DATA0 0x0044 0x0000 0x9 0x0
209 #define MX8ULP_PAD_PTD18__FLEXSPI2_A_DQS 0x0048 0x0000 0x9 0x0
220 #define MX8ULP_PAD_PTD19__FLEXSPI2_A_DATA7 0x004C 0x0000 0x9 0x0
232 #define MX8ULP_PAD_PTD20__FLEXSPI2_A_DATA6 0x0050 0x0000 0x9 0x0
245 #define MX8ULP_PAD_PTD21__FLEXSPI2_A_DATA5 0x0054 0x0000 0x9 0x0
258 #define MX8ULP_PAD_PTD22__FLEXSPI2_A_DATA4 0x0058 0x0000 0x9 0x0
269 #define MX8ULP_PAD_PTD23__FLEXSPI2_A_SS0_B 0x005C 0x0000 0x9 0x0
281 #define MX8ULP_PAD_PTE0__FLEXSPI2_B_DQS 0x0080 0x0974 0x9 0x2
296 #define MX8ULP_PAD_PTE1__FLEXSPI2_B_DATA7 0x0084 0x0970 0x9 0x2
311 #define MX8ULP_PAD_PTE2__FLEXSPI2_B_DATA6 0x0088 0x096C 0x9 0x2
325 #define MX8ULP_PAD_PTE3__FLEXSPI2_B_DATA5 0x008C 0x0968 0x9 0x2
340 #define MX8ULP_PAD_PTE4__FLEXSPI2_B_DATA4 0x0090 0x0964 0x9 0x2
355 #define MX8ULP_PAD_PTE5__FLEXSPI2_B_SS0_B 0x0094 0x0000 0x9 0x0
369 #define MX8ULP_PAD_PTE6__FLEXSPI2_B_SCLK 0x0098 0x0978 0x9 0x2
384 #define MX8ULP_PAD_PTE7__FLEXSPI2_B_DATA3 0x009C 0x0960 0x9 0x2
399 #define MX8ULP_PAD_PTE8__FLEXSPI2_B_DATA2 0x00A0 0x095C 0x9 0x2
413 #define MX8ULP_PAD_PTE9__FLEXSPI2_B_DATA1 0x00A4 0x0958 0x9 0x2
427 #define MX8ULP_PAD_PTE10__FLEXSPI2_B_DATA0 0x00A8 0x0954 0x9 0x2
441 #define MX8ULP_PAD_PTE11__FLEXSPI2_B_SS0_B 0x00AC 0x0000 0x9 0x0
454 #define MX8ULP_PAD_PTE12__FLEXSPI2_B_SS1_B 0x00B0 0x0000 0x9 0x0
503 #define MX8ULP_PAD_PTE16__USB0_ID 0x00C0 0x0AC8 0x9 0x2
516 #define MX8ULP_PAD_PTE17__USB0_PWR 0x00C4 0x0000 0x9 0x0
527 #define MX8ULP_PAD_PTE18__USB0_OC 0x00C8 0x0AC0 0x9 0x2
538 #define MX8ULP_PAD_PTE19__USB1_PWR 0x00CC 0x0000 0x9 0x0
549 #define MX8ULP_PAD_PTE20__USB1_OC 0x00D0 0x0AC4 0x9 0x2
561 #define MX8ULP_PAD_PTE21__USB1_ID 0x00D4 0x0ACC 0x9 0x2
573 #define MX8ULP_PAD_PTE22__EXT_AUD_MCLK3 0x00D8 0x0B14 0x9 0x5
585 #define MX8ULP_PAD_PTE23__EXT_AUD_MCLK2 0x00DC 0x0800 0x9 0x1
596 #define MX8ULP_PAD_PTF0__ENET0_RXD1 0x0100 0x0AFC 0x9 0x2
607 #define MX8ULP_PAD_PTF1__ENET0_RXD0 0x0104 0x0AF8 0x9 0x2
620 #define MX8ULP_PAD_PTF2__ENET0_TXD1 0x0108 0x0000 0x9 0x0
633 #define MX8ULP_PAD_PTF3__ENET0_TXD0 0x010C 0x0000 0x9 0x0
647 #define MX8ULP_PAD_PTF4__ENET0_TXEN 0x0110 0x0000 0x9 0x0
661 #define MX8ULP_PAD_PTF5__ENET0_RXER 0x0114 0x0B08 0x9 0x2
677 #define MX8ULP_PAD_PTF6__ENET0_CRS_DV 0x0118 0x0AEC 0x9 0x2
691 #define MX8ULP_PAD_PTF7__ENET0_REFCLK 0x011C 0x0AF4 0x9 0x2
705 #define MX8ULP_PAD_PTF8__ENET0_MDIO 0x0120 0x0AF0 0x9 0x2
719 #define MX8ULP_PAD_PTF9__ENET0_MDC 0x0124 0x0000 0x9 0x0
734 #define MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x0128 0x0AD0 0x9 0x2
747 #define MX8ULP_PAD_PTF11__ENET0_1588_TMR0 0x012C 0x0AD4 0x9 0x2
761 #define MX8ULP_PAD_PTF12__ENET0_1588_TMR1 0x0130 0x0AD8 0x9 0x2
775 #define MX8ULP_PAD_PTF13__ENET0_1588_TMR2 0x0134 0x0ADC 0x9 0x2
789 #define MX8ULP_PAD_PTF14__ENET0_1588_TMR3 0x0138 0x0AE0 0x9 0x2
801 #define MX8ULP_PAD_PTF15__ENET0_RXD2 0x013C 0x0B00 0x9 0x2
814 #define MX8ULP_PAD_PTF16__ENET0_RXD3 0x0140 0x0B04 0x9 0x2
827 #define MX8ULP_PAD_PTF17__ENET0_RXCLK 0x0144 0x0B0C 0x9 0x2
841 #define MX8ULP_PAD_PTF18__ENET0_TXD2 0x0148 0x0000 0x9 0x0
852 #define MX8ULP_PAD_PTF19__ENET0_TXD3 0x014C 0x0000 0x9 0x0
863 #define MX8ULP_PAD_PTF20__ENET0_TXCLK 0x0150 0x0B10 0x9 0x2
875 #define MX8ULP_PAD_PTF21__ENET0_CRS 0x0154 0x0AE8 0x9 0x2
887 #define MX8ULP_PAD_PTF22__ENET0_COL 0x0158 0x0AE4 0x9 0x2
899 #define MX8ULP_PAD_PTF23__ENET0_TXER 0x015C 0x0000 0x9 0x0
920 #define MX8ULP_PAD_PTF25__EXT_AUD_MCLK2 0x0164 0x0800 0x9 0x3