Lines Matching refs:str
92 str \rd, [\base, #EMC_TIMING_CONTROL]
111 str \rd, [\tmp]
121 str \rd, [\tmp]
144 str \rd, [\r_car_base, #\pll_misc]
148 str \rd, [\r_car_base, #\pll_misc]
166 str \rd, [\car, #\iddq]
172 str \rd, [\car, #\iddq]
227 str r12, [r1]
236 str r3, [r1] @ clear CSR
253 str r3, [r2]
373 str r1, [r0, #CLK_RESET_SCLK_BURST]
374 str r1, [r0, #CLK_RESET_CCLK_BURST]
376 str r1, [r0, #CLK_RESET_CCLK_DIVIDER]
377 str r1, [r0, #CLK_RESET_SCLK_DIVIDER]
432 str r1, [r0, #CLK_RESET_PLLP_BASE]
435 str r1, [r0, #CLK_RESET_PLLP_RESHIFT]
446 str r4, [r0, #CLK_RESET_CLK_SOURCE_MSELECT]
449 str r4, [r0, #CLK_RESET_SCLK_BURST]
453 str r4, [r0, #CLK_RESET_CCLK_BURST]
460 str r1, [r2, #PMC_IO_DPD_REQ] @ DPD_OFF
474 str r1, [r0, #EMC_XM2VTTGENPADCTRL]
476 str r1, [r0, #EMC_XM2VTTGENPADCTRL2]
478 str r1, [r0, #EMC_AUTO_CAL_INTERVAL]
483 str r1, [r0, #EMC_CFG_DIG_DLL]
495 str r1, [r0, #EMC_AUTO_CAL_CONFIG]
504 str r1, [r0, #EMC_CFG]
507 str r1, [r0, #EMC_SELF_REF] @ take DRAM out of self refresh
531 str r2, [r0, #EMC_ZQ_CAL]
541 str r2, [r0, #EMC_ZQ_CAL]
550 str r2, [r0, #EMC_MRW]
560 str r2, [r0, #EMC_MRW]
567 str r1, [r0, #EMC_REQ_CTRL]
569 str r1, [r0, #EMC_ZCAL_INTERVAL]
571 str r1, [r0, #EMC_CFG]
672 str r0, [r5, #CLK_RESET_SCLK_BURST]
677 str r0, [r5, #CLK_RESET_CCLK_BURST]
679 str r0, [r5, #CLK_RESET_CCLK_DIVIDER]
680 str r0, [r5, #CLK_RESET_SCLK_DIVIDER]
685 str r0, [r5, #CLK_RESET_CLK_SOURCE_MSELECT]
703 str r0, [r4, #PMC_PLLP_WB0_OVERRIDE]
711 str r0, [r5, #CLK_RESET_PLLP_BASE]
714 str r0, [r5, #CLK_RESET_PLLP_RESHIFT]
718 str r0, [r5, #CLK_RESET_PLLA_BASE]
721 str r0, [r5, #CLK_RESET_PLLC_BASE]
724 str r0, [r5, #CLK_RESET_PLLX_BASE]
737 str r0, [r5, #CLK_RESET_SCLK_BURST]
756 str r0, [r6, r2]
765 str r0, [r6, r2]
810 str r1, [r8, r9] @ save the content of the addr
829 str r1, [r0, #EMC_ZCAL_INTERVAL]
830 str r1, [r0, #EMC_AUTO_CAL_INTERVAL]
834 str r1, [r0, #EMC_CFG] @ disable DYN_SELF_REF
848 str r1, [r0, #EMC_REQ_CTRL] @ stall incoming DRAM requests
856 str r1, [r0, #EMC_SELF_REF]
870 str r1, [r0, #EMC_XM2VTTGENPADCTRL]
875 str r1, [r0, #EMC_XM2VTTGENPADCTRL2]
896 str r1, [r4, #PMC_IO_DPD_REQ]