Lines Matching refs:irq
6 #include <asm/mach/irq.h>
8 #include <asm/irq.h>
76 int irq;
81 irq = irq_prio_h[reg];
82 if (irq)
83 return irq;
87 irq = irq_prio_d[reg];
88 if (irq)
89 return irq;
93 irq = irq_prio_l[reg];
94 if (irq)
95 return irq;
101 int irq;
104 irq = iomd_get_irq_nr();
105 if (irq)
106 generic_handle_irq(irq);
107 } while (irq);
117 static void iomd_set_base_mask(unsigned int irq, void __iomem *base, u32 mask)
119 struct irq_data *d = irq_get_irq_data(irq);
122 irq_set_chip_data(irq, (void *)(unsigned long)base);
168 unsigned int irq, clr, set;
180 for (irq = 0; irq < NR_IRQS; irq++) {
184 if (irq <= 6 || (irq >= 9 && irq <= 15))
187 if (irq == 21 || (irq >= 16 && irq <= 19) ||
188 irq == IRQ_KEYBOARDTX)
191 switch (irq) {
193 irq_set_chip_and_handler(irq, &iomd_chip_clr,
195 irq_modify_status(irq, clr, set);
196 iomd_set_base_mask(irq, IOMD_BASE + IOMD_IRQSTATA,
197 BIT(irq));
201 irq_set_chip_and_handler(irq, &iomd_chip_noclr,
203 irq_modify_status(irq, clr, set);
204 iomd_set_base_mask(irq, IOMD_BASE + IOMD_IRQSTATB,
205 BIT(irq - 8));
209 irq_set_chip_and_handler(irq, &iomd_chip_noclr,
211 irq_modify_status(irq, clr, set);
212 iomd_set_base_mask(irq, IOMD_BASE + IOMD_DMASTAT,
213 BIT(irq - 16));
217 irq_set_chip(irq, &iomd_chip_noclr);
218 irq_modify_status(irq, clr, set);
219 iomd_set_base_mask(irq, IOMD_BASE + IOMD_FIQSTAT,
220 BIT(irq - 64));