Lines Matching defs:inst
74 static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
79 * @inst: CM instance register offset (*_INST macro)
85 static u32 _clkctrl_idlest(u8 part, u16 inst, u16 clkctrl_offs)
87 u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs);
96 * @inst: CM instance register offset (*_INST macro)
102 static bool _is_module_ready(u8 part, u16 inst, u16 clkctrl_offs)
106 v = _clkctrl_idlest(part, inst, clkctrl_offs);
113 static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
118 return readl_relaxed(_cm_bases[part].va + inst + idx);
122 static void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
127 writel_relaxed(val, _cm_bases[part].va + inst + idx);
131 static u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
136 v = omap4_cminst_read_inst_reg(part, inst, idx);
139 omap4_cminst_write_inst_reg(v, part, inst, idx);
144 static u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
146 return omap4_cminst_rmw_inst_reg_bits(bits, bits, part, inst, idx);
149 static u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
152 return omap4_cminst_rmw_inst_reg_bits(bits, 0x0, part, inst, idx);
155 static u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
159 v = omap4_cminst_read_inst_reg(part, inst, idx);
174 * @inst: CM instance register offset (*_INST macro)
180 static void _clktrctrl_write(u8 c, u8 part, u16 inst, u16 cdoffs)
184 v = omap4_cminst_read_inst_reg(part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
187 omap4_cminst_write_inst_reg(v, part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
193 * @inst: CM instance register offset (*_INST macro)
196 * Returns true if the clockdomain referred to by (@part, @inst, @cdoffs)
199 static bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs)
203 v = omap4_cminst_read_inst_reg(part, inst, cdoffs + OMAP4_CM_CLKSTCTRL);
213 * @inst: CM instance register offset (*_INST macro)
216 * Put a clockdomain referred to by (@part, @inst, @cdoffs) into
219 static void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs)
221 _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, part, inst, cdoffs);
227 * @inst: CM instance register offset (*_INST macro)
230 * Put a clockdomain referred to by (@part, @inst, @cdoffs) into
234 static void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs)
236 _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs);
242 * @inst: CM instance register offset (*_INST macro)
245 * Take a clockdomain referred to by (@part, @inst, @cdoffs) out of idle,
248 static void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
250 _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, part, inst, cdoffs);
257 static void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
259 _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
265 * @inst: CM instance register offset (*_INST macro)
274 static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
279 omap_test_timeout(_is_module_ready(part, inst, clkctrl_offs),
289 * @inst: CM instance register offset (*_INST macro)
297 static int omap4_cminst_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
302 omap_test_timeout((_clkctrl_idlest(part, inst, clkctrl_offs) ==
313 * @inst: CM instance register offset (*_INST macro)
318 static void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst,
323 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs);
326 omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs);
332 * @inst: CM instance register offset (*_INST macro)
337 static void omap4_cminst_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
341 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs);
343 omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs);
476 static u32 omap4_cminst_xlate_clkctrl(u8 part, u16 inst, u16 offset)
478 return _cm_bases[part].pa + inst + offset;