Lines Matching refs:inst
43 static inline u32 am33xx_cm_read_reg(u16 inst, u16 idx)
45 return readl_relaxed(cm_base.va + inst + idx);
49 static inline void am33xx_cm_write_reg(u32 val, u16 inst, u16 idx)
51 writel_relaxed(val, cm_base.va + inst + idx);
55 static inline u32 am33xx_cm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
59 v = am33xx_cm_read_reg(inst, idx);
62 am33xx_cm_write_reg(v, inst, idx);
67 static inline u32 am33xx_cm_read_reg_bits(u16 inst, s16 idx, u32 mask)
71 v = am33xx_cm_read_reg(inst, idx);
80 * @inst: CM instance register offset (*_INST macro)
86 static u32 _clkctrl_idlest(u16 inst, u16 clkctrl_offs)
88 u32 v = am33xx_cm_read_reg(inst, clkctrl_offs);
96 * @inst: CM instance register offset (*_INST macro)
102 static bool _is_module_ready(u16 inst, u16 clkctrl_offs)
106 v = _clkctrl_idlest(inst, clkctrl_offs);
115 * @inst: CM instance register offset (*_INST macro)
121 static void _clktrctrl_write(u8 c, u16 inst, u16 cdoffs)
125 v = am33xx_cm_read_reg(inst, cdoffs);
128 am33xx_cm_write_reg(v, inst, cdoffs);
135 * @inst: CM instance register offset (*_INST macro)
138 * Returns true if the clockdomain referred to by (@inst, @cdoffs)
141 static bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
145 v = am33xx_cm_read_reg(inst, cdoffs);
154 * @inst: CM instance register offset (*_INST macro)
157 * Put a clockdomain referred to by (@inst, @cdoffs) into
160 static void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
162 _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs);
167 * @inst: CM instance register offset (*_INST macro)
170 * Put a clockdomain referred to by (@inst, @cdoffs) into
174 static void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
176 _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs);
181 * @inst: CM instance register offset (*_INST macro)
184 * Put a clockdomain referred to by (@inst, @cdoffs) into idle
187 static void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
189 _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs);
194 * @inst: CM instance register offset (*_INST macro)
197 * Take a clockdomain referred to by (@inst, @cdoffs) out of idle,
200 static void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
202 _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs);
212 * @inst: CM instance register offset (*_INST macro)
221 static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
226 omap_test_timeout(_is_module_ready(inst, clkctrl_offs),
236 * @inst: CM instance register offset (*_INST macro)
244 static int am33xx_cm_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
249 omap_test_timeout((_clkctrl_idlest(inst, clkctrl_offs) ==
260 * @inst: CM instance register offset (*_INST macro)
265 static void am33xx_cm_module_enable(u8 mode, u8 part, u16 inst,
270 v = am33xx_cm_read_reg(inst, clkctrl_offs);
273 am33xx_cm_write_reg(v, inst, clkctrl_offs);
279 * @inst: CM instance register offset (*_INST macro)
284 static void am33xx_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
288 v = am33xx_cm_read_reg(inst, clkctrl_offs);
290 am33xx_cm_write_reg(v, inst, clkctrl_offs);
339 static u32 am33xx_cm_xlate_clkctrl(u8 part, u16 inst, u16 offset)
341 return cm_base.pa + inst + offset;