Lines Matching refs:pm_config
32 static struct davinci_pm_config pm_config = {
47 if (pm_config.cpupll_reg_base != pm_config.ddrpll_reg_base) {
50 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
52 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
57 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
59 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
63 val = __raw_readl(pm_config.deepsleep_reg);
65 val |= pm_config.sleepcount;
66 __raw_writel(val, pm_config.deepsleep_reg);
69 davinci_sram_suspend(&pm_config);
71 if (pm_config.cpupll_reg_base != pm_config.ddrpll_reg_base) {
74 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
76 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
79 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
81 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
87 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
89 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
95 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
98 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
130 pm_config.ddr2_ctlr_base = da8xx_get_mem_ctlr();
131 pm_config.deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG);
133 pm_config.cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K);
134 if (!pm_config.cpupll_reg_base)
137 pm_config.ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K);
138 if (!pm_config.ddrpll_reg_base) {
143 pm_config.ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K);
144 if (!pm_config.ddrpsc_reg_base) {
164 iounmap(pm_config.ddrpsc_reg_base);
166 iounmap(pm_config.ddrpll_reg_base);
168 iounmap(pm_config.cpupll_reg_base);