Lines Matching defs:val
711 u32 val;
712 asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r"(val));
713 return val;
716 static inline void armv7_pmnc_write(u32 val)
718 val &= ARMV7_PMNC_MASK;
720 asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r"(val));
783 static inline void armv7_pmnc_write_evtsel(int idx, u32 val)
786 val &= ARMV7_EVTYPE_MASK;
787 asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val));
820 u32 val;
823 asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val));
826 val &= ARMV7_FLAG_MASK;
827 asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (val));
829 return val;
835 u32 val;
840 asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val));
841 pr_info("PMNC =0x%08x\n", val);
843 asm volatile("mrc p15, 0, %0, c9, c12, 1" : "=r" (val));
844 pr_info("CNTENS=0x%08x\n", val);
846 asm volatile("mrc p15, 0, %0, c9, c14, 1" : "=r" (val));
847 pr_info("INTENS=0x%08x\n", val);
849 asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val));
850 pr_info("FLAGS =0x%08x\n", val);
852 asm volatile("mrc p15, 0, %0, c9, c12, 5" : "=r" (val));
853 pr_info("SELECT=0x%08x\n", val);
855 asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
856 pr_info("CCNT =0x%08x\n", val);
861 asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (val));
863 ARMV7_IDX_TO_COUNTER(cnt), val);
864 asm volatile("mrc p15, 0, %0, c9, c13, 1" : "=r" (val));
866 ARMV7_IDX_TO_COUNTER(cnt), val);
1096 u32 idx, nb_cnt = cpu_pmu->num_events, val;
1099 asm volatile("mrc p15, 0, %0, c1, c1, 1" : "=r" (val));
1100 val |= ARMV7_SDER_SUNIDEN;
1101 asm volatile("mcr p15, 0, %0, c1, c1, 1" : : "r" (val));
1332 u32 val;
1336 asm volatile("mrc p15, 1, %0, c9, c15, 0" : "=r" (val));
1339 asm volatile("mrc p15, 1, %0, c9, c15, 1" : "=r" (val));
1342 asm volatile("mrc p15, 1, %0, c9, c15, 2" : "=r" (val));
1348 return val;
1351 static void krait_write_pmresrn(int n, u32 val)
1355 asm volatile("mcr p15, 1, %0, c9, c15, 0" : : "r" (val));
1358 asm volatile("mcr p15, 1, %0, c9, c15, 1" : : "r" (val));
1361 asm volatile("mcr p15, 1, %0, c9, c15, 2" : : "r" (val));
1370 u32 val;
1371 asm volatile("mrc p10, 7, %0, c11, c0, 0" : "=r" (val));
1372 return val;
1375 static void venum_write_pmresr(u32 val)
1377 asm volatile("mcr p10, 7, %0, c11, c0, 0" : : "r" (val));
1417 u32 val;
1431 val = KRAIT_VPMRESR0_GROUP0;
1433 val = krait_get_pmresrn_event(region);
1434 val += group;
1436 val |= config_base & (ARMV7_EXCLUDE_USER | ARMV7_EXCLUDE_PL1);
1437 armv7_pmnc_write_evtsel(idx, val);
1441 val = venum_read_pmresr();
1442 val &= ~mask;
1443 val |= code << group_shift;
1444 val |= PMRESRn_EN;
1445 venum_write_pmresr(val);
1448 val = krait_read_pmresrn(region);
1449 val &= ~mask;
1450 val |= code << group_shift;
1451 val |= PMRESRn_EN;
1452 krait_write_pmresrn(region, val);
1456 static u32 clear_pmresrn_group(u32 val, int group)
1463 val &= ~mask;
1466 if (val & ~PMRESRn_EN)
1467 return val |= PMRESRn_EN;
1474 u32 val;
1482 val = venum_read_pmresr();
1483 val = clear_pmresrn_group(val, group);
1484 venum_write_pmresr(val);
1487 val = krait_read_pmresrn(region);
1488 val = clear_pmresrn_group(val, group);
1489 krait_write_pmresrn(region, val);
1711 u32 val;
1715 asm volatile("mrc p15, 0, %0, c15, c0, 0" : "=r" (val));
1718 asm volatile("mrc p15, 1, %0, c15, c0, 0" : "=r" (val));
1721 asm volatile("mrc p15, 2, %0, c15, c0, 0" : "=r" (val));
1724 asm volatile("mrc p15, 3, %0, c15, c2, 0" : "=r" (val));
1730 return val;
1733 static void scorpion_write_pmresrn(int n, u32 val)
1737 asm volatile("mcr p15, 0, %0, c15, c0, 0" : : "r" (val));
1740 asm volatile("mcr p15, 1, %0, c15, c0, 0" : : "r" (val));
1743 asm volatile("mcr p15, 2, %0, c15, c0, 0" : : "r" (val));
1746 asm volatile("mcr p15, 3, %0, c15, c2, 0" : : "r" (val));
1764 u32 val;
1778 val = SCORPION_VLPM_GROUP0;
1780 val = scorpion_get_pmresrn_event(region);
1781 val += group;
1783 val |= config_base & (ARMV7_EXCLUDE_USER | ARMV7_EXCLUDE_PL1);
1784 armv7_pmnc_write_evtsel(idx, val);
1790 val = venum_read_pmresr();
1791 val &= ~mask;
1792 val |= code << group_shift;
1793 val |= PMRESRn_EN;
1794 venum_write_pmresr(val);
1797 val = scorpion_read_pmresrn(region);
1798 val &= ~mask;
1799 val |= code << group_shift;
1800 val |= PMRESRn_EN;
1801 scorpion_write_pmresrn(region, val);
1807 u32 val;
1815 val = venum_read_pmresr();
1816 val = clear_pmresrn_group(val, group);
1817 venum_write_pmresr(val);
1820 val = scorpion_read_pmresrn(region);
1821 val = clear_pmresrn_group(val, group);
1822 scorpion_write_pmresrn(region, val);