Lines Matching defs:tlb_op
313 #define tlb_op(f, regs, arg) __tlb_op(f, "p15, 0, %0, " regs, arg)
321 tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);
322 tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);
323 tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);
335 tlb_op(TLB_V7_UIS_FULL, "c8, c7, 0", zero);
352 tlb_op(TLB_V7_UIS_FULL, "c8, c3, 0", zero);
368 tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);
369 tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);
370 tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);
374 tlb_op(TLB_V6_U_ASID, "c8, c7, 2", asid);
375 tlb_op(TLB_V6_D_ASID, "c8, c6, 2", asid);
376 tlb_op(TLB_V6_I_ASID, "c8, c5, 2", asid);
388 tlb_op(TLB_V7_UIS_ASID, "c8, c7, 2", asid);
403 tlb_op(TLB_V7_UIS_ASID, "c8, c3, 0", 0);
405 tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", ASID(mm));
422 tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
423 tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr);
424 tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr);
429 tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", uaddr);
430 tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", uaddr);
431 tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", uaddr);
445 tlb_op(TLB_V7_UIS_PAGE, "c8, c7, 1", uaddr);
463 tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 3", uaddr & PAGE_MASK);
465 tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", uaddr);
477 tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);
478 tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);
479 tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);
483 tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", kaddr);
484 tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", kaddr);
485 tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", kaddr);
498 tlb_op(TLB_V7_UIS_PAGE, "c8, c7, 1", kaddr);
516 tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", kaddr);
574 tlb_op(TLB_DCLEAN, "c7, c10, 1 @ flush_pmd", pmd);
585 tlb_op(TLB_DCLEAN, "c7, c10, 1 @ flush_pmd", pmd);
589 #undef tlb_op