Lines Matching refs:sachip
197 static int sa1111_map_irq(struct sa1111 *sachip, irq_hw_number_t hwirq)
199 return irq_create_mapping(sachip->irqdomain, hwirq);
210 struct sa1111 *sachip = irq_desc_get_handler_data(desc);
212 void __iomem *mapbase = sachip->base + SA1111_INTC;
228 irqdomain = sachip->irqdomain;
258 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
259 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
269 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
270 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
287 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
288 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
311 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
312 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
334 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
335 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
361 struct sa1111 *sachip = d->host_data;
367 irq_set_chip_data(irq, sachip);
379 static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
381 void __iomem *irqbase = sachip->base + SA1111_INTC;
387 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
391 dev_err(sachip->dev, "unable to allocate %u irqs: %d\n",
398 sachip->irq_base = ret;
419 sachip->irqdomain = irq_domain_add_linear(NULL, SA1111_IRQ_NR,
421 sachip);
422 if (!sachip->irqdomain) {
423 irq_free_descs(sachip->irq_base, SA1111_IRQ_NR);
427 irq_domain_associate_many(sachip->irqdomain,
428 sachip->irq_base + IRQ_GPAIN0,
430 irq_domain_associate_many(sachip->irqdomain,
431 sachip->irq_base + AUDXMTDMADONEA,
438 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
439 irq_set_chained_handler_and_data(sachip->irq, sa1111_irq_handler,
440 sachip);
442 dev_info(sachip->dev, "Providing IRQ%u-%u\n",
443 sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1);
448 static void sa1111_remove_irq(struct sa1111 *sachip)
450 struct irq_domain *domain = sachip->irqdomain;
451 void __iomem *irqbase = sachip->base + SA1111_INTC;
460 irq_set_chained_handler_and_data(sachip->irq, NULL, NULL);
465 release_mem_region(sachip->phys + SA1111_INTC, 512);
481 static void __iomem *sa1111_gpio_map_reg(struct sa1111 *sachip, unsigned offset)
483 void __iomem *reg = sachip->base + SA1111_GPIO;
517 struct sa1111 *sachip = gc_to_sa1111(gc);
518 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
526 struct sa1111 *sachip = gc_to_sa1111(gc);
528 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
531 spin_lock_irqsave(&sachip->lock, flags);
534 spin_unlock_irqrestore(&sachip->lock, flags);
542 struct sa1111 *sachip = gc_to_sa1111(gc);
544 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
547 spin_lock_irqsave(&sachip->lock, flags);
552 spin_unlock_irqrestore(&sachip->lock, flags);
559 struct sa1111 *sachip = gc_to_sa1111(gc);
560 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
568 struct sa1111 *sachip = gc_to_sa1111(gc);
570 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
573 spin_lock_irqsave(&sachip->lock, flags);
576 spin_unlock_irqrestore(&sachip->lock, flags);
582 struct sa1111 *sachip = gc_to_sa1111(gc);
584 void __iomem *reg = sachip->base + SA1111_GPIO;
590 spin_lock_irqsave(&sachip->lock, flags);
597 spin_unlock_irqrestore(&sachip->lock, flags);
602 struct sa1111 *sachip = gc_to_sa1111(gc);
604 return sa1111_map_irq(sachip, offset);
607 static int sa1111_setup_gpios(struct sa1111 *sachip)
609 sachip->gc.label = "sa1111";
610 sachip->gc.parent = sachip->dev;
611 sachip->gc.owner = THIS_MODULE;
612 sachip->gc.get_direction = sa1111_gpio_get_direction;
613 sachip->gc.direction_input = sa1111_gpio_direction_input;
614 sachip->gc.direction_output = sa1111_gpio_direction_output;
615 sachip->gc.get = sa1111_gpio_get;
616 sachip->gc.set = sa1111_gpio_set;
617 sachip->gc.set_multiple = sa1111_gpio_set_multiple;
618 sachip->gc.to_irq = sa1111_gpio_to_irq;
619 sachip->gc.base = -1;
620 sachip->gc.ngpio = 18;
622 return devm_gpiochip_add_data(sachip->dev, &sachip->gc, sachip);
639 static void sa1111_wake(struct sa1111 *sachip)
643 spin_lock_irqsave(&sachip->lock, flags);
645 clk_enable(sachip->clk);
650 r = readl_relaxed(sachip->base + SA1111_SKCR);
652 writel_relaxed(r, sachip->base + SA1111_SKCR);
654 writel_relaxed(r, sachip->base + SA1111_SKCR);
666 writel_relaxed(r, sachip->base + SA1111_SKCR);
677 writel_relaxed(0, sachip->base + SA1111_SKPCR);
679 spin_unlock_irqrestore(&sachip->lock, flags);
699 sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
707 writel_relaxed(smcr, sachip->base + SA1111_SMCR);
714 if (sachip->dev->dma_mask)
715 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
717 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
729 sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
745 dev->dev.parent = sachip->dev;
748 dev->res.start = sachip->phys + info->offset;
752 dev->mapbase = sachip->base + info->offset;
762 if (info->dma && sachip->dev->dma_mask) {
763 dev->dma_mask = *sachip->dev->dma_mask;
765 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
770 dev_err(sachip->dev, "failed to allocate resource for %s\n",
804 struct sa1111 *sachip;
812 sachip = devm_kzalloc(me, sizeof(struct sa1111), GFP_KERNEL);
813 if (!sachip)
816 sachip->clk = devm_clk_get(me, "SA1111_CLK");
817 if (IS_ERR(sachip->clk))
818 return PTR_ERR(sachip->clk);
820 ret = clk_prepare(sachip->clk);
824 spin_lock_init(&sachip->lock);
826 sachip->dev = me;
827 dev_set_drvdata(sachip->dev, sachip);
829 sachip->pdata = pd;
830 sachip->phys = mem->start;
831 sachip->irq = irq;
837 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
838 if (!sachip->base) {
846 id = readl_relaxed(sachip->base + SA1111_SKID);
859 sa1111_wake(sachip);
865 ret = sa1111_setup_irq(sachip, pd->irq_base);
870 ret = sa1111_setup_gpios(sachip);
885 sa1111_configure_smc(sachip, 1,
894 val = readl_relaxed(sachip->base + SA1111_SKPCR);
895 writel_relaxed(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
904 g_sa1111 = sachip;
912 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
917 sa1111_remove_irq(sachip);
919 clk_disable(sachip->clk);
921 iounmap(sachip->base);
923 clk_unprepare(sachip->clk);
938 static void __sa1111_remove(struct sa1111 *sachip)
940 device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
942 sa1111_remove_irq(sachip);
944 clk_disable(sachip->clk);
945 clk_unprepare(sachip->clk);
947 iounmap(sachip->base);
975 struct sa1111 *sachip = dev_get_drvdata(dev);
984 sachip->saved_state = save;
986 spin_lock_irqsave(&sachip->lock, flags);
991 base = sachip->base;
999 writel_relaxed(0, sachip->base + SA1111_SKPWM0);
1000 writel_relaxed(0, sachip->base + SA1111_SKPWM1);
1002 base = sachip->base + SA1111_INTC;
1015 val = readl_relaxed(sachip->base + SA1111_SKCR);
1016 writel_relaxed(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
1018 clk_disable(sachip->clk);
1020 spin_unlock_irqrestore(&sachip->lock, flags);
1040 struct sa1111 *sachip = dev_get_drvdata(dev);
1045 save = sachip->saved_state;
1053 id = readl_relaxed(sachip->base + SA1111_SKID);
1055 __sa1111_remove(sachip);
1064 sa1111_wake(sachip);
1075 spin_lock_irqsave(&sachip->lock, flags);
1077 writel_relaxed(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
1078 writel_relaxed(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
1080 base = sachip->base;
1088 base = sachip->base + SA1111_INTC;
1098 spin_unlock_irqrestore(&sachip->lock, flags);
1100 sachip->saved_state = NULL;
1128 struct sa1111 *sachip = platform_get_drvdata(pdev);
1130 if (sachip) {
1132 kfree(sachip->saved_state);
1133 sachip->saved_state = NULL;
1135 __sa1111_remove(sachip);
1177 static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1181 skcdr = readl_relaxed(sachip->base + SA1111_SKCDR);
1201 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1203 return __sa1111_pll_clock(sachip);
1217 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1221 spin_lock_irqsave(&sachip->lock, flags);
1223 val = readl_relaxed(sachip->base + SA1111_SKCR);
1229 writel_relaxed(val, sachip->base + SA1111_SKCR);
1231 spin_unlock_irqrestore(&sachip->lock, flags);
1242 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1248 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1254 writel_relaxed(div - 1, sachip->base + SA1111_SKAUD);
1266 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1272 div = readl_relaxed(sachip->base + SA1111_SKAUD) + 1;
1274 return __sa1111_pll_clock(sachip) / (256 * div);
1288 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1293 if (sachip->pdata && sachip->pdata->enable)
1294 ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid);
1297 spin_lock_irqsave(&sachip->lock, flags);
1298 val = readl_relaxed(sachip->base + SA1111_SKPCR);
1299 writel_relaxed(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1300 spin_unlock_irqrestore(&sachip->lock, flags);
1312 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1316 spin_lock_irqsave(&sachip->lock, flags);
1317 val = readl_relaxed(sachip->base + SA1111_SKPCR);
1318 writel_relaxed(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1319 spin_unlock_irqrestore(&sachip->lock, flags);
1321 if (sachip->pdata && sachip->pdata->disable)
1322 sachip->pdata->disable(sachip->pdata->data, sadev->devid);
1328 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1331 return sa1111_map_irq(sachip, sadev->hwirq[num]);