Lines Matching refs:set
142 tst \reg, #(1 << 5) @ CP15BEN bit set?
354 * r4 = final kernel address (possibly with LSB set)
451 * r4 = final kernel address (possibly with LSB set)
551 * r4 = kernel execution address (possibly with LSB set)
811 orrhs r1, r1, r6 @ set RAM section settings
822 orr r1, r6, #0x04 @ ensure B is set for this
1488 THUMB( orr r1, r1, #(1 << 30) ) @ set HSCTLR.TE
1491 mcr p15, 4, r0, c12, c0, 0 @ set HYP vector base (HVBAR)
1497 @ into SVC mode now, and let the decompressor set up its cached
1504 orr r4, r9, #1 @ restore image base and set LSB
1510 orreq r4, r4, #1 @ set LSB if not