Lines Matching refs:intel_pt_log
711 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s hit filter: %s offset %#"PRIx64" size %#"PRIx64"\n",
723 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s is not in a filter region\n",
1222 intel_pt_log("queue %u getting timestamp\n", queue_nr);
1223 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
1237 intel_pt_log("queue %u has no timestamp\n",
1248 intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
1951 intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
2251 intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
2258 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
2291 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
2299 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
2349 intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
2414 intel_pt_log("queue %u cpu %d pid %d tid %d\n",
2522 intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
2547 intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
2622 intel_pt_log("context_switch event has no tid\n");
2638 intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
2701 intel_pt_log("Invalidated instruction cache for %s at %#"PRIx64"\n",
2781 intel_pt_log("event %u: cpu %d time %"PRIu64" tsc %#"PRIx64" ",
3247 intel_pt_log("%s: %u range(s)\n", __func__, n);
3261 intel_pt_log("range %d: perf time interval: %"PRIu64" to %"PRIu64"\n",
3263 intel_pt_log("range %d: TSC time interval: %#"PRIx64" to %#"PRIx64"\n",
3504 intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
3505 intel_pt_log("Maximum non-turbo ratio %u\n",