Lines Matching refs:insn
14 #include "../include/asm/insn.h" /* __ignore_sync_check__ */
22 #define validate_next(t, insn, n) \
23 ((insn)->next_byte + sizeof(t) + n <= (insn)->end_kaddr)
25 #define __get_next(t, insn) \
26 ({ t r = *(t*)insn->next_byte; insn->next_byte += sizeof(t); r; })
28 #define __peek_nbyte_next(t, insn, n) \
29 ({ t r = *(t*)((insn)->next_byte + n); r; })
31 #define get_next(t, insn) \
32 ({ if (unlikely(!validate_next(t, insn, 0))) goto err_out; __get_next(t, insn); })
34 #define peek_nbyte_next(t, insn, n) \
35 ({ if (unlikely(!validate_next(t, insn, n))) goto err_out; __peek_nbyte_next(t, insn, n); })
37 #define peek_next(t, insn) peek_nbyte_next(t, insn, 0)
40 * insn_init() - initialize struct insn
41 * @insn: &struct insn to be initialized
45 void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64)
54 memset(insn, 0, sizeof(*insn));
55 insn->kaddr = kaddr;
56 insn->end_kaddr = kaddr + buf_len;
57 insn->next_byte = kaddr;
58 insn->x86_64 = x86_64 ? 1 : 0;
59 insn->opnd_bytes = 4;
61 insn->addr_bytes = 8;
63 insn->addr_bytes = 4;
69 static int __insn_get_emulate_prefix(struct insn *insn,
75 if (peek_nbyte_next(insn_byte_t, insn, i) != prefix[i])
79 insn->emulate_prefix_size = len;
80 insn->next_byte += len;
88 static void insn_get_emulate_prefix(struct insn *insn)
90 if (__insn_get_emulate_prefix(insn, xen_prefix, sizeof(xen_prefix)))
93 __insn_get_emulate_prefix(insn, kvm_prefix, sizeof(kvm_prefix));
98 * @insn: &struct insn containing instruction
100 * Populates the @insn->prefixes bitmap, and updates @insn->next_byte
101 * to point to the (first) opcode. No effect if @insn->prefixes.got
108 int insn_get_prefixes(struct insn *insn)
110 struct insn_field *prefixes = &insn->prefixes;
118 insn_get_emulate_prefix(insn);
122 b = peek_next(insn_byte_t, insn);
135 if (insn->x86_64)
136 insn->addr_bytes ^= 12;
138 insn->addr_bytes ^= 6;
141 insn->opnd_bytes ^= 6;
145 insn->next_byte++;
147 b = peek_next(insn_byte_t, insn);
151 if (lb && lb != insn->prefixes.bytes[3]) {
152 if (unlikely(insn->prefixes.bytes[3])) {
154 b = insn->prefixes.bytes[3];
159 insn->prefixes.bytes[3] = lb;
163 if (insn->x86_64) {
164 b = peek_next(insn_byte_t, insn);
167 insn->rex_prefix.value = b;
168 insn->rex_prefix.nbytes = 1;
169 insn->next_byte++;
172 insn->opnd_bytes = 8;
175 insn->rex_prefix.got = 1;
178 b = peek_next(insn_byte_t, insn);
181 insn_byte_t b2 = peek_nbyte_next(insn_byte_t, insn, 1);
182 if (!insn->x86_64) {
191 insn->vex_prefix.bytes[0] = b;
192 insn->vex_prefix.bytes[1] = b2;
194 b2 = peek_nbyte_next(insn_byte_t, insn, 2);
195 insn->vex_prefix.bytes[2] = b2;
196 b2 = peek_nbyte_next(insn_byte_t, insn, 3);
197 insn->vex_prefix.bytes[3] = b2;
198 insn->vex_prefix.nbytes = 4;
199 insn->next_byte += 4;
200 if (insn->x86_64 && X86_VEX_W(b2))
202 insn->opnd_bytes = 8;
204 b2 = peek_nbyte_next(insn_byte_t, insn, 2);
205 insn->vex_prefix.bytes[2] = b2;
206 insn->vex_prefix.nbytes = 3;
207 insn->next_byte += 3;
208 if (insn->x86_64 && X86_VEX_W(b2))
210 insn->opnd_bytes = 8;
217 insn->vex_prefix.bytes[2] = b2 & 0x7f;
218 insn->vex_prefix.nbytes = 2;
219 insn->next_byte += 2;
223 insn->vex_prefix.got = 1;
235 * @insn: &struct insn containing instruction
237 * Populates @insn->opcode, updates @insn->next_byte to point past the
238 * opcode byte(s), and set @insn->attr (except for groups).
240 * Sets @insn->opcode.value = opcode1. No effect if @insn->opcode.got
247 int insn_get_opcode(struct insn *insn)
249 struct insn_field *opcode = &insn->opcode;
256 if (!insn->prefixes.got) {
257 ret = insn_get_prefixes(insn);
263 op = get_next(insn_byte_t, insn);
268 if (insn_is_avx(insn)) {
270 m = insn_vex_m_bits(insn);
271 p = insn_vex_p_bits(insn);
272 insn->attr = inat_get_avx_attribute(op, m, p);
273 if ((inat_must_evex(insn->attr) && !insn_is_evex(insn)) ||
274 (!inat_accept_vex(insn->attr) &&
275 !inat_is_group(insn->attr))) {
277 insn->attr = 0;
284 insn->attr = inat_get_opcode_attribute(op);
285 while (inat_is_escape(insn->attr)) {
287 op = get_next(insn_byte_t, insn);
289 pfx_id = insn_last_prefix_id(insn);
290 insn->attr = inat_get_escape_attribute(op, pfx_id, insn->attr);
293 if (inat_must_vex(insn->attr)) {
295 insn->attr = 0;
308 * @insn: &struct insn containing instruction
310 * Populates @insn->modrm and updates @insn->next_byte to point past the
312 * (prefixes and opcode(s)). No effect if @insn->modrm.got is already 1.
318 int insn_get_modrm(struct insn *insn)
320 struct insn_field *modrm = &insn->modrm;
327 if (!insn->opcode.got) {
328 ret = insn_get_opcode(insn);
333 if (inat_has_modrm(insn->attr)) {
334 mod = get_next(insn_byte_t, insn);
337 if (inat_is_group(insn->attr)) {
338 pfx_id = insn_last_prefix_id(insn);
339 insn->attr = inat_get_group_attribute(mod, pfx_id,
340 insn->attr);
341 if (insn_is_avx(insn) && !inat_accept_vex(insn->attr)) {
342 /* Bad insn */
343 insn->attr = 0;
349 if (insn->x86_64 && inat_is_force64(insn->attr))
350 insn->opnd_bytes = 8;
362 * @insn: &struct insn containing instruction
365 * ModRM byte. No effect if @insn->x86_64 is 0.
367 int insn_rip_relative(struct insn *insn)
369 struct insn_field *modrm = &insn->modrm;
372 if (!insn->x86_64)
376 ret = insn_get_modrm(insn);
389 * @insn: &struct insn containing instruction
398 int insn_get_sib(struct insn *insn)
403 if (insn->sib.got)
406 if (!insn->modrm.got) {
407 ret = insn_get_modrm(insn);
412 if (insn->modrm.nbytes) {
413 modrm = (insn_byte_t)insn->modrm.value;
414 if (insn->addr_bytes != 2 &&
416 insn->sib.value = get_next(insn_byte_t, insn);
417 insn->sib.nbytes = 1;
420 insn->sib.got = 1;
431 * @insn: &struct insn containing instruction
441 int insn_get_displacement(struct insn *insn)
446 if (insn->displacement.got)
449 if (!insn->sib.got) {
450 ret = insn_get_sib(insn);
455 if (insn->modrm.nbytes) {
473 mod = X86_MODRM_MOD(insn->modrm.value);
474 rm = X86_MODRM_RM(insn->modrm.value);
475 base = X86_SIB_BASE(insn->sib.value);
479 insn->displacement.value = get_next(signed char, insn);
480 insn->displacement.nbytes = 1;
481 } else if (insn->addr_bytes == 2) {
483 insn->displacement.value =
484 get_next(short, insn);
485 insn->displacement.nbytes = 2;
490 insn->displacement.value = get_next(int, insn);
491 insn->displacement.nbytes = 4;
496 insn->displacement.got = 1;
504 static int __get_moffset(struct insn *insn)
506 switch (insn->addr_bytes) {
508 insn->moffset1.value = get_next(short, insn);
509 insn->moffset1.nbytes = 2;
512 insn->moffset1.value = get_next(int, insn);
513 insn->moffset1.nbytes = 4;
516 insn->moffset1.value = get_next(int, insn);
517 insn->moffset1.nbytes = 4;
518 insn->moffset2.value = get_next(int, insn);
519 insn->moffset2.nbytes = 4;
524 insn->moffset1.got = insn->moffset2.got = 1;
533 static int __get_immv32(struct insn *insn)
535 switch (insn->opnd_bytes) {
537 insn->immediate.value = get_next(short, insn);
538 insn->immediate.nbytes = 2;
542 insn->immediate.value = get_next(int, insn);
543 insn->immediate.nbytes = 4;
556 static int __get_immv(struct insn *insn)
558 switch (insn->opnd_bytes) {
560 insn->immediate1.value = get_next(short, insn);
561 insn->immediate1.nbytes = 2;
564 insn->immediate1.value = get_next(int, insn);
565 insn->immediate1.nbytes = 4;
568 insn->immediate1.value = get_next(int, insn);
569 insn->immediate1.nbytes = 4;
570 insn->immediate2.value = get_next(int, insn);
571 insn->immediate2.nbytes = 4;
576 insn->immediate1.got = insn->immediate2.got = 1;
584 static int __get_immptr(struct insn *insn)
586 switch (insn->opnd_bytes) {
588 insn->immediate1.value = get_next(short, insn);
589 insn->immediate1.nbytes = 2;
592 insn->immediate1.value = get_next(int, insn);
593 insn->immediate1.nbytes = 4;
601 insn->immediate2.value = get_next(unsigned short, insn);
602 insn->immediate2.nbytes = 2;
603 insn->immediate1.got = insn->immediate2.got = 1;
612 * @insn: &struct insn containing instruction
623 int insn_get_immediate(struct insn *insn)
627 if (insn->immediate.got)
630 if (!insn->displacement.got) {
631 ret = insn_get_displacement(insn);
636 if (inat_has_moffset(insn->attr)) {
637 if (!__get_moffset(insn))
642 if (!inat_has_immediate(insn->attr))
646 switch (inat_immediate_size(insn->attr)) {
648 insn->immediate.value = get_next(signed char, insn);
649 insn->immediate.nbytes = 1;
652 insn->immediate.value = get_next(short, insn);
653 insn->immediate.nbytes = 2;
656 insn->immediate.value = get_next(int, insn);
657 insn->immediate.nbytes = 4;
660 insn->immediate1.value = get_next(int, insn);
661 insn->immediate1.nbytes = 4;
662 insn->immediate2.value = get_next(int, insn);
663 insn->immediate2.nbytes = 4;
666 if (!__get_immptr(insn))
670 if (!__get_immv32(insn))
674 if (!__get_immv(insn))
678 /* Here, insn must have an immediate, but failed */
681 if (inat_has_second_immediate(insn->attr)) {
682 insn->immediate2.value = get_next(signed char, insn);
683 insn->immediate2.nbytes = 1;
686 insn->immediate.got = 1;
695 * @insn: &struct insn containing instruction
704 int insn_get_length(struct insn *insn)
708 if (insn->length)
711 if (!insn->immediate.got) {
712 ret = insn_get_immediate(insn);
717 insn->length = (unsigned char)((unsigned long)insn->next_byte
718 - (unsigned long)insn->kaddr);
725 * @insn: &struct insn to be initialized
727 * @buf_len: length of the insn buffer at @kaddr
728 * @m: insn mode, see enum insn_mode
734 int insn_decode(struct insn *insn, const void *kaddr, int buf_len, enum insn_mode m)
741 insn_init(insn, kaddr, buf_len, IS_ENABLED(CONFIG_X86_64));
743 insn_init(insn, kaddr, buf_len, m == INSN_MODE_64);
745 ret = insn_get_length(insn);
749 if (insn_complete(insn))