Lines Matching defs:AMD7930_DR
72 #define AMD7930_DR 0x01UL /* Data Register (R/W) */
354 sbus_writeb(0, amd->regs + AMD7930_DR);
365 sbus_writeb(AM_INIT_ACTIVE, amd->regs + AMD7930_DR);
376 sbus_writeb(AM_INIT_ACTIVE | AM_INIT_DISABLE_INTS, amd->regs + AMD7930_DR);
388 sbus_writeb(((map->gx >> 0) & 0xff), amd->regs + AMD7930_DR);
389 sbus_writeb(((map->gx >> 8) & 0xff), amd->regs + AMD7930_DR);
392 sbus_writeb(((map->gr >> 0) & 0xff), amd->regs + AMD7930_DR);
393 sbus_writeb(((map->gr >> 8) & 0xff), amd->regs + AMD7930_DR);
396 sbus_writeb(((map->stgr >> 0) & 0xff), amd->regs + AMD7930_DR);
397 sbus_writeb(((map->stgr >> 8) & 0xff), amd->regs + AMD7930_DR);
400 sbus_writeb(((map->ger >> 0) & 0xff), amd->regs + AMD7930_DR);
401 sbus_writeb(((map->ger >> 8) & 0xff), amd->regs + AMD7930_DR);
404 sbus_writeb(map->mmr1, amd->regs + AMD7930_DR);
407 sbus_writeb(map->mmr2, amd->regs + AMD7930_DR);
550 sbus_writeb(AM_MUX_MCR4_ENABLE_INTS, amd->regs + AMD7930_DR);
558 sbus_writeb(0, amd->regs + AMD7930_DR);
975 amd->regs + AMD7930_DR);