Lines Matching defs:level
51 * Level status and interrupt: whenever FIFO level is below FIFO trigger,
52 * level status is 1 and an IRQ is asserted (if enabled).
81 /* current fifo level estimate.
83 * the actual FIFO level in order to avoid stall on push attempt.
87 /* FIFO level at which level interrupt occurs */
90 /* maximal FIFO level */
197 /* After the push the level IRQ is still asserted,
198 * means FIFO level is below tx_fifo_low. Estimate
237 /* Update FIFO level estimate in accordance with interrupt status
288 unsigned freq, ratio, level;
316 for (level = 1;
318 level < (XTFPGA_I2S_CONFIG_LEVEL_MASK >>
319 XTFPGA_I2S_CONFIG_LEVEL_BASE); ++level)
326 level << XTFPGA_I2S_CONFIG_LEVEL_BASE);
331 dev_dbg(i2s->dev, "%s freq: %u, ratio: %u, level: %u\n",
332 __func__, freq, ratio, level);