Lines Matching defs:pll_id
23 static bool is_valid_pll(struct uniphier_aio_chip *chip, int pll_id)
27 if (pll_id < 0 || chip->num_plls <= pll_id) {
28 dev_err(dev, "PLL(%d) is not supported\n", pll_id);
32 return chip->plls[pll_id].enable;
121 * @pll_id: PLL ID, should be AUD_PLL_XX
128 static int find_divider(struct uniphier_aio *aio, int pll_id, unsigned int freq)
135 if (!is_valid_pll(aio->chip, pll_id))
138 pll = &aio->chip->plls[pll_id];
152 int pll_id, div_id;
158 pll_id = AUD_PLL_A1;
161 pll_id = AUD_PLL_F1;
164 pll_id = AUD_PLL_A2;
167 pll_id = AUD_PLL_F2;
170 pll_id = AUD_PLL_A1;
174 pll_id = AUD_PLL_F1;
178 pll_id = AUD_PLL_APLL;
181 pll_id = AUD_PLL_RX0;
184 pll_id = AUD_PLL_USB0;
187 pll_id = AUD_PLL_HSC0;
195 for (pll_id = 0; pll_id < aio->chip->num_plls; pll_id++) {
196 div_id = find_divider(aio, pll_id, freq);
202 if (pll_id == aio->chip->num_plls) {
210 aio->pll_out = pll_id;
212 aio->pll_in = pll_id;
217 static int uniphier_aio_set_pll(struct snd_soc_dai *dai, int pll_id,
224 if (!is_valid_pll(aio->chip, pll_id))
227 ret = aio_chip_set_pll(aio->chip, pll_id, freq_out);