Lines Matching defs:mcpdm
3 * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
30 #include "omap-mcpdm.h"
67 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
69 writel_relaxed(val, mcpdm->io_base + reg);
72 static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
74 return readl_relaxed(mcpdm->io_base + reg);
78 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
80 dev_dbg(mcpdm->dev, "***********************\n");
81 dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n",
82 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
83 dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n",
84 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
85 dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n",
86 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
87 dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n",
88 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
89 dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
90 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
91 dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
92 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
93 dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n",
94 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
95 dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n",
96 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
97 dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n",
98 omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
99 dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n",
100 omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
101 dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
102 omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
103 dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
104 omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
105 dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n",
106 omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
107 dev_dbg(mcpdm->dev, "***********************\n");
110 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
117 static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
119 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
120 u32 link_mask = mcpdm->config[0].link_mask | mcpdm->config[1].link_mask;
123 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
126 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
129 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
136 static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
138 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
142 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
145 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
148 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
155 static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
157 return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
165 static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
167 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
169 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl | MCPDM_WD_EN);
171 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
176 if (mcpdm->dn_rx_offset) {
177 u32 dn_offset = mcpdm->dn_rx_offset;
179 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
181 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
184 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN,
185 mcpdm->config[SNDRV_PCM_STREAM_PLAYBACK].threshold);
186 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP,
187 mcpdm->config[SNDRV_PCM_STREAM_CAPTURE].threshold);
189 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
197 static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
200 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
204 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
207 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
211 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
214 if (mcpdm->dn_rx_offset)
215 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
220 struct omap_mcpdm *mcpdm = dev_id;
223 irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
226 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
229 dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
232 dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
235 dev_dbg(mcpdm->dev, "DN (playback) write request\n");
238 dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
241 dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
244 dev_dbg(mcpdm->dev, "UP (capture) write request\n");
252 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
254 mutex_lock(&mcpdm->mutex);
257 omap_mcpdm_open_streams(mcpdm);
259 mutex_unlock(&mcpdm->mutex);
267 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
272 mutex_lock(&mcpdm->mutex);
275 if (omap_mcpdm_active(mcpdm)) {
276 omap_mcpdm_stop(mcpdm);
277 omap_mcpdm_close_streams(mcpdm);
278 mcpdm->config[0].link_mask = 0;
279 mcpdm->config[1].link_mask = 0;
283 if (mcpdm->latency[stream2])
284 cpu_latency_qos_update_request(&mcpdm->pm_qos_req,
285 mcpdm->latency[stream2]);
286 else if (mcpdm->latency[stream1])
287 cpu_latency_qos_remove_request(&mcpdm->pm_qos_req);
289 mcpdm->latency[stream1] = 0;
291 mutex_unlock(&mcpdm->mutex);
298 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
335 threshold = mcpdm->config[stream].threshold;
341 if (!mcpdm->config[!stream].link_mask)
342 mcpdm->config[!stream].link_mask = 0x3;
349 if (!mcpdm->config[!stream].link_mask)
350 mcpdm->config[!stream].link_mask = (0x3 << 3);
360 mcpdm->latency[stream] = latency * USEC_PER_SEC / params_rate(params);
362 if (!mcpdm->latency[stream])
363 mcpdm->latency[stream] = 10;
366 if (mcpdm->config[stream].link_mask &&
367 mcpdm->config[stream].link_mask != link_mask)
368 mcpdm->restart = true;
370 mcpdm->config[stream].link_mask = link_mask;
378 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
379 struct pm_qos_request *pm_qos_req = &mcpdm->pm_qos_req;
383 int latency = mcpdm->latency[stream2];
386 if (!latency || mcpdm->latency[stream1] < latency)
387 latency = mcpdm->latency[stream1];
394 if (!omap_mcpdm_active(mcpdm)) {
395 omap_mcpdm_start(mcpdm);
396 omap_mcpdm_reg_dump(mcpdm);
397 } else if (mcpdm->restart) {
398 omap_mcpdm_stop(mcpdm);
399 omap_mcpdm_start(mcpdm);
400 mcpdm->restart = false;
401 omap_mcpdm_reg_dump(mcpdm);
416 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
419 pm_runtime_enable(mcpdm->dev);
422 pm_runtime_get_sync(mcpdm->dev);
423 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
425 ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler, 0, "McPDM",
426 (void *)mcpdm);
428 pm_runtime_put_sync(mcpdm->dev);
431 dev_err(mcpdm->dev, "Request for IRQ failed\n");
432 pm_runtime_disable(mcpdm->dev);
436 mcpdm->config[SNDRV_PCM_STREAM_PLAYBACK].threshold = 2;
437 mcpdm->config[SNDRV_PCM_STREAM_CAPTURE].threshold =
441 &mcpdm->dma_data[SNDRV_PCM_STREAM_PLAYBACK],
442 &mcpdm->dma_data[SNDRV_PCM_STREAM_CAPTURE]);
449 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
451 free_irq(mcpdm->irq, (void *)mcpdm);
452 pm_runtime_disable(mcpdm->dev);
454 if (cpu_latency_qos_request_active(&mcpdm->pm_qos_req))
455 cpu_latency_qos_remove_request(&mcpdm->pm_qos_req);
463 struct omap_mcpdm *mcpdm = snd_soc_component_get_drvdata(component);
466 omap_mcpdm_stop(mcpdm);
467 omap_mcpdm_close_streams(mcpdm);
470 mcpdm->pm_active_count = 0;
471 while (pm_runtime_active(mcpdm->dev)) {
472 pm_runtime_put_sync(mcpdm->dev);
473 mcpdm->pm_active_count++;
481 struct omap_mcpdm *mcpdm = snd_soc_component_get_drvdata(component);
483 if (mcpdm->pm_active_count) {
484 while (mcpdm->pm_active_count--)
485 pm_runtime_get_sync(mcpdm->dev);
488 omap_mcpdm_open_streams(mcpdm);
489 omap_mcpdm_start(mcpdm);
527 .name = "omap-mcpdm",
535 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0));
537 mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
543 struct omap_mcpdm *mcpdm;
547 mcpdm = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcpdm), GFP_KERNEL);
548 if (!mcpdm)
551 platform_set_drvdata(pdev, mcpdm);
553 mutex_init(&mcpdm->mutex);
559 mcpdm->dma_data[0].addr = res->start + MCPDM_REG_DN_DATA;
560 mcpdm->dma_data[1].addr = res->start + MCPDM_REG_UP_DATA;
562 mcpdm->dma_data[0].filter_data = "dn_link";
563 mcpdm->dma_data[1].filter_data = "up_link";
566 mcpdm->io_base = devm_ioremap_resource(&pdev->dev, res);
567 if (IS_ERR(mcpdm->io_base))
568 return PTR_ERR(mcpdm->io_base);
570 mcpdm->irq = platform_get_irq(pdev, 0);
571 if (mcpdm->irq < 0)
572 return mcpdm->irq;
574 mcpdm->dev = &pdev->dev;
586 { .compatible = "ti,omap4-mcpdm", },
593 .name = "omap-mcpdm",
602 MODULE_ALIAS("platform:omap-mcpdm");