Lines Matching defs:i2s
34 #define DRV_NAME "tegra20-i2s"
38 struct tegra20_i2s *i2s = dev_get_drvdata(dev);
40 clk_disable_unprepare(i2s->clk_i2s);
47 struct tegra20_i2s *i2s = dev_get_drvdata(dev);
50 ret = clk_prepare_enable(i2s->clk_i2s);
62 struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);
110 regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL, mask, val);
120 struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);
145 regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL, mask, val);
152 ret = clk_set_rate(i2s->clk_i2s, i2sclock);
166 regmap_write(i2s->regmap, TEGRA20_I2S_TIMING, val);
168 regmap_write(i2s->regmap, TEGRA20_I2S_FIFO_SCR,
175 static void tegra20_i2s_start_playback(struct tegra20_i2s *i2s)
177 regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,
182 static void tegra20_i2s_stop_playback(struct tegra20_i2s *i2s)
184 regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,
188 static void tegra20_i2s_start_capture(struct tegra20_i2s *i2s)
190 regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,
195 static void tegra20_i2s_stop_capture(struct tegra20_i2s *i2s)
197 regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,
204 struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);
211 tegra20_i2s_start_playback(i2s);
213 tegra20_i2s_start_capture(i2s);
219 tegra20_i2s_stop_playback(i2s);
221 tegra20_i2s_stop_capture(i2s);
232 struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);
234 dai->capture_dma_data = &i2s->capture_dma_data;
235 dai->playback_dma_data = &i2s->playback_dma_data;
327 struct tegra20_i2s *i2s;
332 i2s = devm_kzalloc(&pdev->dev, sizeof(struct tegra20_i2s), GFP_KERNEL);
333 if (!i2s) {
337 dev_set_drvdata(&pdev->dev, i2s);
339 i2s->dai = tegra20_i2s_dai_template;
340 i2s->dai.name = dev_name(&pdev->dev);
342 i2s->clk_i2s = clk_get(&pdev->dev, NULL);
343 if (IS_ERR(i2s->clk_i2s)) {
344 dev_err(&pdev->dev, "Can't retrieve i2s clock\n");
345 ret = PTR_ERR(i2s->clk_i2s);
356 i2s->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
358 if (IS_ERR(i2s->regmap)) {
360 ret = PTR_ERR(i2s->regmap);
364 i2s->capture_dma_data.addr = mem->start + TEGRA20_I2S_FIFO2;
365 i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
366 i2s->capture_dma_data.maxburst = 4;
368 i2s->playback_dma_data.addr = mem->start + TEGRA20_I2S_FIFO1;
369 i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
370 i2s->playback_dma_data.maxburst = 4;
380 &i2s->dai, 1);
403 clk_put(i2s->clk_i2s);
410 struct tegra20_i2s *i2s = dev_get_drvdata(&pdev->dev);
419 clk_put(i2s->clk_i2s);
425 { .compatible = "nvidia,tegra20-i2s", },