Lines Matching refs:sdev
72 static void bdw_host_done(struct snd_sof_dev *sdev);
73 static void bdw_dsp_done(struct snd_sof_dev *sdev);
74 static void bdw_get_reply(struct snd_sof_dev *sdev);
80 static int bdw_run(struct snd_sof_dev *sdev)
83 snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_HMDC,
88 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR,
95 static int bdw_reset(struct snd_sof_dev *sdev)
98 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR,
106 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR,
113 static int bdw_set_dsp_D0(struct snd_sof_dev *sdev)
119 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_VDRTCTL2,
124 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_VDRTCTL0,
128 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_PMCS,
133 reg = readl(sdev->bar[BDW_PCI_BAR] + PCI_PMCS)
148 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR,
153 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR,
160 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CLKCTL,
169 bdw_reset(sdev);
172 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_VDRTCTL2,
181 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_VDRTCTL2,
189 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_VDRTCTL0,
193 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR2,
198 snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_HMDC,
205 snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_IMRX,
207 snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_IMRD,
212 snd_sof_dsp_write(sdev, BDW_DSP_BAR, SHIM_IPCX, 0x0);
213 snd_sof_dsp_write(sdev, BDW_DSP_BAR, SHIM_IPCD, 0x0);
214 snd_sof_dsp_write(sdev, BDW_DSP_BAR, 0x80, 0x6);
215 snd_sof_dsp_write(sdev, BDW_DSP_BAR, 0xe0, 0x300a);
220 static void bdw_get_registers(struct snd_sof_dev *sdev,
225 u32 offset = sdev->dsp_oops_offset;
228 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
234 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n",
239 sof_mailbox_read(sdev, offset, panic_info, sizeof(*panic_info));
243 sof_mailbox_read(sdev, offset, stack, stack_words * sizeof(u32));
246 static void bdw_dump(struct snd_sof_dev *sdev, u32 flags)
254 status = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCD);
255 panic = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCX);
256 bdw_get_registers(sdev, &xoops, &panic_info, stack,
258 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, stack,
262 imrx = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IMRX);
263 imrd = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IMRD);
264 dev_err(sdev->dev,
268 dev_err(sdev->dev,
272 dev_err(sdev->dev,
276 dev_err(sdev->dev,
288 struct snd_sof_dev *sdev = context;
293 isr = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_ISRX);
302 struct snd_sof_dev *sdev = context;
305 imrx = snd_sof_dsp_read64(sdev, BDW_DSP_BAR, SHIM_IMRX);
306 ipcx = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCX);
312 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR,
316 spin_lock_irq(&sdev->ipc_lock);
325 bdw_get_reply(sdev);
326 snd_sof_ipc_reply(sdev, ipcx);
328 bdw_dsp_done(sdev);
330 spin_unlock_irq(&sdev->ipc_lock);
333 ipcd = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCD);
339 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR,
345 snd_sof_dsp_panic(sdev, BDW_PANIC_OFFSET(ipcx) +
348 snd_sof_ipc_msgs_rx(sdev);
351 bdw_host_done(sdev);
361 static int bdw_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
364 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data,
366 snd_sof_dsp_write(sdev, BDW_DSP_BAR, SHIM_IPCX, SHIM_IPCX_BUSY);
371 static void bdw_get_reply(struct snd_sof_dev *sdev)
373 struct snd_sof_ipc_msg *msg = sdev->msg;
383 dev_warn(sdev->dev, "unexpected ipc interrupt raised!\n");
388 sof_mailbox_read(sdev, sdev->host_box.offset, &reply, sizeof(reply));
396 dev_err(sdev->dev, "error: reply expected %zu got %u bytes\n",
403 sof_mailbox_read(sdev, sdev->host_box.offset,
410 static int bdw_get_mailbox_offset(struct snd_sof_dev *sdev)
415 static int bdw_get_window_offset(struct snd_sof_dev *sdev, u32 id)
420 static void bdw_host_done(struct snd_sof_dev *sdev)
423 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IPCD,
428 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IMRX,
432 static void bdw_dsp_done(struct snd_sof_dev *sdev)
435 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IPCX,
439 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IMRX,
446 static int bdw_probe(struct snd_sof_dev *sdev)
448 struct snd_sof_pdata *pdata = sdev->pdata;
451 container_of(sdev->dev, struct platform_device, dev);
463 dev_err(sdev->dev, "error: failed to get LPE base at idx %d\n",
468 dev_dbg(sdev->dev, "LPE PHY base at 0x%x size 0x%x", base, size);
469 sdev->bar[BDW_DSP_BAR] = devm_ioremap(sdev->dev, base, size);
470 if (!sdev->bar[BDW_DSP_BAR]) {
471 dev_err(sdev->dev,
476 dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[BDW_DSP_BAR]);
479 sdev->mmio_bar = BDW_DSP_BAR;
480 sdev->mailbox_bar = BDW_DSP_BAR;
481 sdev->dsp_oops_offset = MBOX_OFFSET;
490 dev_err(sdev->dev, "error: failed to get PCI base at idx %d\n",
495 dev_dbg(sdev->dev, "PCI base at 0x%x size 0x%x", base, size);
496 sdev->bar[BDW_PCI_BAR] = devm_ioremap(sdev->dev, base, size);
497 if (!sdev->bar[BDW_PCI_BAR]) {
498 dev_err(sdev->dev,
503 dev_dbg(sdev->dev, "PCI VADDR %p\n", sdev->bar[BDW_PCI_BAR]);
506 sdev->ipc_irq = platform_get_irq(pdev, desc->irqindex_host_ipc);
507 if (sdev->ipc_irq < 0)
508 return sdev->ipc_irq;
510 dev_dbg(sdev->dev, "using IRQ %d\n", sdev->ipc_irq);
511 ret = devm_request_threaded_irq(sdev->dev, sdev->ipc_irq,
513 IRQF_SHARED, "AudioDSP", sdev);
515 dev_err(sdev->dev, "error: failed to register IRQ %d\n",
516 sdev->ipc_irq);
521 ret = bdw_set_dsp_D0(sdev);
523 dev_err(sdev->dev, "error: failed to set DSP D0\n");
528 ret = dma_coerce_mask_and_coherent(sdev->dev, DMA_BIT_MASK(31));
530 dev_err(sdev->dev, "error: failed to set DMA mask %d\n", ret);
535 snd_sof_dsp_mailbox_init(sdev, MBOX_OFFSET, MBOX_SIZE, 0, 0);
540 static void bdw_machine_select(struct snd_sof_dev *sdev)
542 struct snd_sof_pdata *sof_pdata = sdev->pdata;
548 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n");