Lines Matching defs:regmap
19 struct regmap *regmap;
30 regmap_update_bits(usp->regmap, USP_TX_FIFO_OP,
32 regmap_write(usp->regmap, USP_TX_FIFO_OP, 0);
34 regmap_update_bits(usp->regmap, USP_TX_FIFO_OP,
37 regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
43 regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
46 regmap_write(usp->regmap, USP_TX_FIFO_OP, 0);
51 regmap_update_bits(usp->regmap, USP_RX_FIFO_OP,
53 regmap_write(usp->regmap, USP_RX_FIFO_OP, 0);
55 regmap_update_bits(usp->regmap, USP_RX_FIFO_OP,
58 regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
64 regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
67 regmap_write(usp->regmap, USP_RX_FIFO_OP, 0);
119 regmap_update_bits(usp->regmap, USP_RISC_DSP_MODE,
126 regmap_write(usp->regmap, USP_TX_DMA_IO_LEN, 0);
127 regmap_write(usp->regmap, USP_RX_DMA_IO_LEN, 0);
130 regmap_write(usp->regmap, USP_MODE2, (1 << USP_RXD_DELAY_LEN_OFFSET) |
135 regmap_write(usp->regmap, USP_MODE1,
141 regmap_write(usp->regmap, USP_RX_DMA_IO_CTRL, 0);
144 regmap_write(usp->regmap, USP_RX_FIFO_CTRL,
149 regmap_write(usp->regmap, USP_RX_FIFO_LEVEL_CHK,
153 regmap_write(usp->regmap, USP_TX_DMA_IO_CTRL, 0);
156 regmap_write(usp->regmap, USP_TX_FIFO_CTRL,
160 regmap_write(usp->regmap, USP_TX_FIFO_LEVEL_CHK,
192 regmap_update_bits(usp->regmap, USP_RX_FRAME_CTRL,
196 regmap_update_bits(usp->regmap, USP_RX_FRAME_CTRL,
210 regmap_update_bits(usp->regmap, USP_MODE1,
219 regmap_update_bits(usp->regmap, USP_TX_FRAME_CTRL,
227 regmap_update_bits(usp->regmap, USP_RX_FRAME_CTRL,
322 regmap_read(usp->regmap, USP_MODE1, &usp->mode1_reg);
323 regmap_read(usp->regmap, USP_MODE2, &usp->mode2_reg);
338 regmap_write(usp->regmap, USP_MODE1, usp->mode1_reg);
339 regmap_write(usp->regmap, USP_MODE2, usp->mode2_reg);
373 usp->regmap = devm_regmap_init_mmio(&pdev->dev, base,
375 if (IS_ERR(usp->regmap))
376 return PTR_ERR(usp->regmap);